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High Performance ASIC Design
Using Synthesizable Domino Logic in an ASIC Flow

$139.00 (P)

Thomas D. Zounes, Bernard Bourgin
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  • Date Published: September 2008
  • availability: In stock
  • format: Hardback
  • isbn: 9780521873345

$ 139.00 (P)
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  • Presenting a methodology for using domino logic in an ASIC design flow developed over several years in an industrial context, this text covers practical issues related to the use of domino logic in an automated framework, and brings together all the knowledge needed to apply these design techniques in practice. Beginning with a discussion of how to achieve high speed in ASIC designs, subsequent chapters detail the design and characterization of standard cell compatible domino logic libraries and an advanced domino logic synthesis flow. The results achieved by using automated domino logic design techniques, including silicon measurements, are used to validate the presented solution. With design examples including the implementation of the execution unit of a microprocessor and a Viterbi decoder, this text is ideal for graduate students and researchers in electrical and computer engineering and also for circuit designers in industry.

    • Presents a methodology developed over several years in an industrial context
    • Contains all the knowledge needed to use domino logic
    • Includes detailed, real-world examples
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    Product details

    • Date Published: September 2008
    • format: Hardback
    • isbn: 9780521873345
    • length: 160 pages
    • dimensions: 254 x 178 x 13 mm
    • weight: 0.47kg
    • contains: 7 b/w illus.
    • availability: In stock
  • Table of Contents

    1. An introduction to domino logic
    2. High speed digital design
    3. Domino logic library design Thomas D Zounes and Razak Hossain
    4. Domino logic synthesis Bernard Bourgin and Razak Hossain
    5. Circuits designed with domino logic in an ASIC flow
    6. Evolution of domino logic synthesis.

  • Author

    Razak Hossain, STMicroelectronics, San Diego
    Razak Hossain is Senior Principal Engineer at STMicroelectonics, San Diego, California, where he has worked since 2000 on high speed ASIC chips and design methodologies. He gained his Ph.D. in Electrical Engineering from the University of Rochester, New York, in 1995, before taking a position at Mentor Graphics Corporation, Warren, New Jersey.

    Contributors

    Thomas D. Zounes, Bernard Bourgin

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