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Arithmetic Optimization Techniques for Hardware and Software Design

$112.00 (C)

  • Date Published: June 2010
  • availability: In stock
  • format: Hardback
  • isbn: 9780521880992

$ 112.00 (C)
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About the Authors
  • Obtain better system performance, lower energy consumption, and avoid hand-coding arithmetic functions with this concise guide to automated optimization techniques for hardware and software design. High-level compiler optimizations and high-speed architectures for implementing FIR filters are covered, which can improve performance in communications, signal processing, computer graphics, and cryptography. Clearly explained algorithms and illustrative examples throughout make it easy to understand the techniques and write software for their implementation. Background information on the synthesis of arithmetic expressions and computer arithmetic is also included, making the book ideal for newcomers to the subject. This is an invaluable resource for researchers, professionals, and graduate students working in system level design and automation, compilers, and VLSI CAD.

    • Provides automated techniques for optimizing arithmetic expressions so designers can avoid coding the functions by hand
    • Includes background information on the synthesis of arithmetic expressions and computer arithmetic, making the book ideal for newcomers to the subject
    • Clearly explained algorithms and illustrative examples make it easy to understand and implement the techniques
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    Product details

    • Date Published: June 2010
    • format: Hardback
    • isbn: 9780521880992
    • length: 200 pages
    • dimensions: 254 x 180 x 15 mm
    • weight: 0.54kg
    • contains: 13 tables
    • availability: In stock
  • Table of Contents

    Preface
    1. Introduction
    2. Use of polynomial expressions and linear systems
    3. Software compilation
    4. Hardware synthesis
    5. Fundamentals of digital arithmetic
    6. Polynomial expressions
    7. Linear systems.

  • Authors

    Ryan Kastner, University of California, San Diego
    Ryan Kastner is an Associate Professor in the Department of Computer Science and Engineering at the University of California, San Diego. He received his Ph.D. in Computer Science from UCLA in 2002 and has since published over 90 technical papers and two books. His current research interests are in embedded system design, particularly the use of reconfigurable computing devices for digital signal processing.

    Anup Hosangadi, Cadence Design Systems Inc.
    Anup Hosangadi is a R&D Engineer in the Emulation Group at Cadence Design Systems, Inc. He received his Ph.D. in Computer Engineering from the University of California, Santa Barbara, in 2006 and his research interests include high-level synthesis, combinatorial optimization, and computer arithmetic.

    Farzan Fallah, Stanford University, California
    Farzan Fallah is currently an Engineer Director at Envis Corporation, Santa Clara. He received his Ph.D. in Electrical Engineering and Computer Science from MIT in 1999, after which he worked as a Project Leader at Fujitsu Labs of America in Sunnyvale until 2008. Farzan has published over 60 papers and has 20 patents granted or pending. He has received a Best Paper Award at the Design Automation Conference in 1998 and a Best Paper Award at the VLSI Design Conference in 2005. He is currently the co-chair of the Low Power Technical Committee of ACM SIGDA and an associate editor of the ACM Transactions on Design Automation of Electronic Systems.

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