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CMOS and Beyond
Logic Switches for Terascale Integrated Circuits

$124.00 (P)

Elad Alon, Zachery A. Jacobson, Kelin J. Kuhn, Asif Islam Khan, Sayeef Salahuddin, Sapan Agarwal, Eli Yablonovitch, Alan Seabaugh, Zhengping Jiang, Gerhard Klimeck, Qin Zhang, Pei Zhao, Nan Ma, Grace (Huili) Xing, Debdeep Jena, Sanjay Bannerjee, Frank Register, Dharmendar Reddy, You Zhou, Sieu D. Ha, Shriram Ramanathan, Paul M. Solomon, Bruce G. Elmegreen, Matt Copel, Marcelo A. Kuroda, Susan Trolier-McKinstry, Glenn J. Martyna, Dennis M. Newns, Tsu-Jae King Liu, Rhesa Nathanael, György Csaba, Gary H. Bernstein, Alexei Orlov, Michael T. Niemier, X. Sharon Hu, Wolfgang Porod, Dmitri E. Nikonov, George I. Bourianoff, Alexander Khitun, Ahmet Ceyhan, Shaloo Rakheja, Azad Naeemi
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  • Date Published: April 2015
  • availability: In stock
  • format: Hardback
  • isbn: 9781107043183

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About the Authors
  • Get up to speed with the future of logic switch design with this indispensable overview of the most promising successors to modern CMOS transistors. Learn how to overcome existing design challenges using novel device concepts, presented using an in-depth, accessible, tutorial-style approach. Drawing on the expertise of leading researchers from both industry and academia, and including insightful contributions from the developers of many of these alternative logic devices, new concepts are introduced and discussed from a range of different viewpoints, covering all the necessary theoretical background and developmental context. Covering cutting-edge developments with the potential to overcome existing limitations on transistor performance, such as tunneling field-effect transistors (TFETs), alternative charge-based devices, spin-based devices, and more exotic approaches, this is essential reading for academic researchers, professional engineers, and graduate students working with semiconductor devices and technology.

    • Carefully selected topics, chosen by highly regarded leading experts from both academia and industry, focus on the most interesting upcoming technologies
    • Outlines the radically different operating principles behind new switch designs
    • Presents state-of-the-art transistor research in an accessible, tutorial-style framework
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    Product details

    • Date Published: April 2015
    • format: Hardback
    • isbn: 9781107043183
    • length: 436 pages
    • dimensions: 255 x 180 x 25 mm
    • weight: 1kg
    • contains: 250 b/w illus.
    • availability: In stock
  • Table of Contents

    1. Energy-efficiency limits of digital circuits based on CMOS transistors Elad Alon
    2. Beyond transistor scaling: alternative device structures for the terascale regime Zachery A. Jacobson and Kelin J. Kuhn
    3. Benchmarking alternative device structures for the terascale regime Zachery A. Jacobson and Kelin J. Kuhn
    4. Extending CMOS with negative capacitance Asif Islam Khan and Sayeef Salahuddin
    5. Designing a low voltage, high current tunneling transistor Sapan Agarwal and Eli Yablonovitch
    6. Tunnel transistors Alan Seabaugh, Zhengping Jiang and Gerhard Klimeck
    7. Graphene and 2D crystal tunnel transistors Qin Zhang, Pei Zhao, Nan Ma, Grace (Huili) Xing and Debdeep Jena
    8. Bilayer pseudospin field effect transistor Sanjay Bannerjee, Frank Register and Dharmendar Reddy
    9. Computation and learning with metal-insulator transitions and emergent phases in correlated oxides You Zhou, Sieu D. Ha and Shriram Ramanathan
    10. The piezo-electronic transistor Paul M. Solomon, Bruce G. Elmegreen, Matt Copel, Marcelo A. Kuroda, Susan Trolier-McKinstry, Glenn J. Martyna and Dennis M. Newns
    11. Mechanical switches Tsu-Jae King Liu and Rhesa Nathanael
    12. Nanomagnetic logic: from magnetic ordering to magnetic computing György Csaba, Gary H. Bernstein, Alexei Orlov, Michael T. Niemier, X. Sharon Hu and Wolfgang Porod
    13. Spin torque majority gate logic Dmitri E. Nikonov and George I. Bourianoff
    14. Spin wave phase logic Alexander Khitun
    15. Interconnect considerations Ahmet Ceyhan, Shaloo Rakheja and Azad Naeemi.

  • Editors

    Tsu-Jae King Liu, University of California, Berkeley
    Tsu-Jae King Liu is the Conexant Systems Distinguished Professor, Department of Electrical Engineering and Computer Sciences at the University of California, Berkeley. A co-inventor of the FinFET, she has been awarded the IEEE Kiyo Tomiyasu Award (2010), the Electrochemical Society Thomas D. Calinan Award (2011), and the Intel Outstanding Researcher Award (2012). She is a Fellow of the IEEE.

    Kelin Kuhn, Cornell University, New York
    Kelin Kuhn is an Intel Fellow and Director of Advanced Device Technology in the Technology and Manufacturing Group at Intel Corporation. She is responsible for research on new device architectures and has been awarded two Intel Achievement Awards, one for high-k metal-gate (2006) and one for Trigate (2008), as well as the IEEE Paul Rappaport Award (2013). She is a Fellow of the IEEE.

    Contributors

    Elad Alon, Zachery A. Jacobson, Kelin J. Kuhn, Asif Islam Khan, Sayeef Salahuddin, Sapan Agarwal, Eli Yablonovitch, Alan Seabaugh, Zhengping Jiang, Gerhard Klimeck, Qin Zhang, Pei Zhao, Nan Ma, Grace (Huili) Xing, Debdeep Jena, Sanjay Bannerjee, Frank Register, Dharmendar Reddy, You Zhou, Sieu D. Ha, Shriram Ramanathan, Paul M. Solomon, Bruce G. Elmegreen, Matt Copel, Marcelo A. Kuroda, Susan Trolier-McKinstry, Glenn J. Martyna, Dennis M. Newns, Tsu-Jae King Liu, Rhesa Nathanael, György Csaba, Gary H. Bernstein, Alexei Orlov, Michael T. Niemier, X. Sharon Hu, Wolfgang Porod, Dmitri E. Nikonov, George I. Bourianoff, Alexander Khitun, Ahmet Ceyhan, Shaloo Rakheja, Azad Naeemi

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