Testing of Digital Systems
Adobe eBook Reader
Other available formats:
Looking for an evaluation copy?
This title is not currently available for evaluation. However, if you are interested in the title for your course we can consider offering an evaluation copy. To register your interest please contact email@example.com providing details of the course you are teaching.
Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.Read more
- Most comprehensive book yet on digital systems testing
- Covers all the latest techniques
- Includes System-on-a-Chip testing
Not yet reviewed
Be the first to review
Review was not posted due to profanity×
- Date Published: February 2005
- format: Adobe eBook Reader
- isbn: 9780511074622
- contains: 90 tables
- availability: This ISBN is for an eBook version which is distributed on our behalf by a third party.
Table of Contents
2. Fault models
3. Combinational logic and fault simulation
4. Test generation for combinational circuits
5. Sequential ATPG
6. IDDQ testing
7. Functional testing
8. Delay fault testing
9. CMOS testing
10. Fault diagnosis
11. Design for testability
12. Built-in self-test
13. Synthesis for testability
14. Memory testing
15. High-level test synthesis
16. System-on-a-chip testing
Find resources associated with this titleYour search for '' returned .
Type Name Unlocked * Format Size
*This title has one or more locked files and access is given only to lecturers adopting the textbook for their class. We need to enforce this strictly so that solutions are not made available to students. To gain access to locked resources you either need first to sign in or register for an account.
These resources are provided free of charge by Cambridge University Press with permission of the author of the corresponding work, but are subject to copyright. You are permitted to view, print and download these resources for your own personal use only, provided any copyright lines on the resources are not removed or altered in any way. Any other use, including but not limited to distribution of the resources in modified form, or via electronic or other media, is strictly prohibited unless you have permission from the author of the corresponding work and provided you give appropriate acknowledgement of the source.
If you are having problems accessing these resources please email firstname.lastname@example.org
Instructors have used or reviewed this title for the following courses
- Senior Design Project
- Testing and Testable Design
- Testing of Digital Systems
Sorry, this resource is locked
Please register or sign in to request access. If you are having problems accessing these resources please email email@example.comRegister Sign in
You are now leaving the Cambridge University Press website. Your eBook purchase and download will be completed by our partner www.ebooks.com. Please see the permission section of the www.ebooks.com catalogue page for details of the print & copy limits on our eBooks.Continue ×