Hostname: page-component-8448b6f56d-dnltx Total loading time: 0 Render date: 2024-04-24T01:13:32.481Z Has data issue: false hasContentIssue false
  • English
  • Français

Optoelectronic CMOS Transistors: Performance Advantages for Sub-7nm ULSI, RF ASIC, Memories, and Power MOSFETs

Published online by Cambridge University Press:  15 April 2019

James N. Pan
James N. Pan*
Affiliation:
Advanced Enterprise and License Company (AELC)
*
*Email: nan-hsi.pan@ngc.com
Get access

Abstract

Substantial increase of output current, and Ion / Ioff ratio for sub-7nm low power CMOS transistors, can be accomplished using a novel optoelectronic technology, which is 100% compatible with existing CMOS process flow. For RF or mixed signal ASICs, adding photonic components may improve the cut-off frequency, and reduce series resistance. Products that utilize power regulating devices, such as power MOSFETs, will benefit from the optoelectronic configuration to achieve much lower Rdson and high voltage at the same time. For semiconductor memories, such as DRAM or FLASH, the photonic technique may reduce the ERASE / WRITE / access time and improve the reliability.

Keywords

microelectronicsoptoelectronicphotonicelectronic materiallaser
Type
Articles
Information
MRS Advances , Volume 4 , Issue 48: Electronics and Photonics , 2019 , pp. 2585 - 2591
Copyright
Copyright © Materials Research Society 2019 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

Fiore, A., Ilegems, M., “High-Efficient Light Emitting Diodes at 1.3um Using InAs-InGaAs Quantum Dots”, IEEE Photonic Technology Letters, Vol. 12, No. 12, December 2000.CrossRefGoogle Scholar
Kuwatsuka, H., “High Speed InP/InGaAs Avalanche Photodiodes with a Compositionally Graded Quaternary Layer”, IEEE Transactions Photonics Technology Letters, Vol.3 No. 12 December 1991.CrossRefGoogle Scholar
Jayaraman, V., Maurice, R.A., “Continous Wave Operation of Single Transverse Mode 1310-nm VCSELs up to 150°C”, IEEE Photonics Technology Letters, Vol. 12, No. 12 December 2000.CrossRefGoogle Scholar
Shchekin, O., “Low Threshold Continuous Wave Two Stack Quantum Dot Laser with Reduced Temperature Sensitivity,” IEEE Photonics Technology Letters, Vol. 12, No. 9, September 2000.CrossRefGoogle Scholar
Rienold, M., “Low-Voltage Terahertz QCLs Based on LO Phonon Assisted Interminiband Transitions”, Electronics Letters, 24th September 2009, Vol. 45, No.20.Google Scholar
Grabherr, M., “Efficient Bottom-Emitting VCSEL Arrays for High CW Optical Output Power”, Electronics Letters, June 1988, Vol. 34, No. 12.Google Scholar
Pan, J., “Optoelectronic CMOS Transistor for Sub-14nm Technology Nodes: Performance Advantage, Process Integration, and Technical Challenges,” 2018 Silicon Nanoelectronics Workshop (SNW18) June 17-18, 2018, Honolulu, Hawaii, USA.Google Scholar
Choi, H., “A Vertical Power MOSFET with the Extended Trench Oxide”, 2014 International Conference on Electronics, Information and Communications (ICEIC).CrossRefGoogle Scholar
Pan, J., “The Gate Controlled Diode, High Frequency and Quasi-Static CV Techniques for Characterizing Advanced Vertical Trenched Power MOSFETs” IEEE Transactions on Electron Devices, Vol.56, No.6, June 2009.CrossRefGoogle Scholar
Pan, J., “60V P- and NMOS Transistors and Schottky Diodes Compatible with SiGe BiCMOS, RF Inductors, and Sub-22nm CMOS Technology without Drain Current Degradation and Heating Effects for Mixed-Signal VLSI Applications,” The 17th IEEE RWW (Radio Wireless Week) Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SiRF) 15 – 18 January 2017, Phoenix, AZ, USA.Google Scholar