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Blistering on Silicon Surface Caused by Gettering of Hydrogen on Post-Implantation Defects

Published online by Cambridge University Press:  21 March 2011

A.Y. Usenko  and
W.N. Carr
A.Y. Usenko
Affiliation:
Silicon Wafer Technologies Inc., 240 King Blvd., Newark, NJ, 07102, USA
W.N. Carr
Affiliation:
New Jersey Institute of Technology, 323 King Blvd., Newark, NJ, 07102, USA
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Abstract

A well-known process for thinning of silicon by slicing submicron-thick crystalline films from substrates uses direct implantation of protons. In this paper we describe a different way of delivering hydrogen to a cleavage plane. In our process a defect-rich buried layer is first formed with ion implantation. Defects in the as-implanted silicon work as traps for hydrogen. Next monatomic hydrogen is delivered to the trap layer by electrolytic charging. To check sliceability, the samples were annealed and blistering was observed. Evidence of blistering is a sign of potential cleavage. The electrolytic charging was performed using a simple two-electrode cell. The front side of the as-implanted silicon wafer was exposed to an electrolyte. The backside of the wafer was contacted with an aluminum layer and connected to a current source. The acidic electrolyte was buffered with ethylene glycol. Buffering was used to suppress bubbling on the wafer surface and to improve the uniformity of charging. To increase charging current the wafer was illuminated with visible light. A graphite rod was used as the positive electrode in the cell. A few Coulombs per square centimeter of the wafer were passed through the cell during the hydrogenation process. The depth of blisters is about 1/2 of projection range of the implanted ions. It means that the hydrogen platelets are formed in the region of maximum of vacancy- enriched post-implantation defects. This process of electrolytic hydrogen charging may be used in future to manufacture silicon-on-insulator wafers with very thin top silicon layer. Thin SOI offers important advantages in the production of substrates for mainstream CMOS integrated circuit manufacturing.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 681: Symposium I – Wafer Bonding and Thinning Techniques for Materials Integration , 2001 , I3.3
Copyright
Copyright © Materials Research Society 2001

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References

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