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Effects of Reverse Biased Floating Voltage at Source and Drain During High-Field Electron Injection on the Performance of NMOSFETS

Published online by Cambridge University Press:  10 February 2011

R. K. Jarwal
Affiliation:
Department of Electrical and Computer Engineering, New Jersey Institute of Technology University Heights, Newark, NJ 07102-1982
D. Misra
Affiliation:
Department of Electrical and Computer Engineering, New Jersey Institute of Technology University Heights, Newark, NJ 07102-1982
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Abstract

We have examined the effects of reverse biased floating voltage at the source and drain junctions during constant current high-field electron injection on the performance of NMOSFETs. Device parameter degradation was studied when electrons were injected from both gate and substrate. Hole trapping and electron trapping (observed from threshold voltage degradation) were found to be enhanced with reverse biased floating voltage for devices subjected to substrate injection. On the other hand, damages in the devices subjected to gate injection were found to be minimal dependent on reverse biased voltage. Increase in current density due to reduction in effective channel length is believed to be the cause of modified device characteristics. Transconductance degradation for both substrate injection and gate injection was found to have minimal dependence on reverse biased voltage. An asymmetry in the distribution of electron traps at the gate-oxide and substrate-oxide interfaces was observed.

Type
Research Article
Copyright
Copyright © Materials Research Society 2000

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References

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