As ULSI device critical dimensions continue to shrink to submicron sizes, electron microscopy techniques such as electron beam induced current (EBIC) and voltage contrast are finding more applications towards pinpointing failure sites for subsequent cross sectioning or deprocessing. In addition to the traditional use of EBIC for junction delineation, EBIC has been applied to locate leakage sites in capacitor structures and silicon-on-insulator (SOI) devices as well. Similarly, voltage contrast has been applied to identify single or multiple opens in via chains which consist of thousands of vias. In addition to a brief revisit of the basic principles of EBIC and voltage contrast, focus will be placed on the application of EBIC and voltage contrast in failure analysis of semiconductor devices. Examples of using voltage contrast combined with precision cross section focused ion beam (XFIB) for identifying the failure mechanism of 0.8μm vias will be presented. Also, the use of EBIC for identifying leakage sites in SOI and bipolar devices and subsequent FIB/scanning electron microscopy (SEM) analysis will be presented.