Optimization of the interface between the organic semiconductor (OSC) & the source-drain (S/D) electrode is critical in order to improve organic thin film transistor (OTFT) device performance. This process typically involves coating the metal S/D electrodes with an optimal self-assembled thiol layer; a process that requires pristine metal surfaces for successful treatment. Obtaining contamination free surfaces can be challenging in the case of printed metal electrodes. Here we demonstrate an effective strategy to address this issue by introducing a brief low power forming gas plasma treatment prior to the surface coating step. We show a two orders of magnitude decrease in the contact resistance as a result of this treatment.
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