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Threshold Voltage Shift in Hetero-nanocystal Floating Gate Flash Memory

Published online by Cambridge University Press:  01 February 2011

Yan Zhu ,
Dengtao Zhao ,
Ruigang Li  and
Jianlin Liu
Yan Zhu
Affiliation:
Quantum Structures Laboratory, Department of Electrical Engineering, University of California, Riverside, CA 92521
Dengtao Zhao
Affiliation:
Quantum Structures Laboratory, Department of Electrical Engineering, University of California, Riverside, CA 92521
Ruigang Li
Affiliation:
Quantum Structures Laboratory, Department of Electrical Engineering, University of California, Riverside, CA 92521
Jianlin Liu
Affiliation:
Quantum Structures Laboratory, Department of Electrical Engineering, University of California, Riverside, CA 92521
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Abstract

The threshold voltage shift of a p-channel Ge/Si hetero-nanocrystal floating gate memory device was investigated both numerically and phenomenologically. The numerical investigations, by solving 2-D Poisson-Boltzmann equation, show that the presence of the Ge on Si dot tremendously prolongs the retention time, reflected by the time decay behavior of the threshold voltage shift. The increase of the thickness of either Si or Ge dot will reduce the threshold voltage shift. The shift strongly depends on the dot density. Nevertheless, only a weak relation between the threshold voltage shift and the tunneling oxide thickness was found. A circuit model was then introduced to interpret the behavior of threshold voltage shift, which agrees well with the results of the numerical method.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 832: Symposium F – Group IV Semiconductor Nanostructures , 2004 , F3.4
Copyright
Copyright © Materials Research Society 2005

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References

REFERENCES

1. Welser, J., Tiwari, S., Rishton, S., Lee, K. Y., and Lee, Y., IEEE Electron Device Lett. 18, 278 (1997).Google Scholar
2. Ishii, , Yano, K., Sano, T., Mine, T., Murai, F., and Seki, K., Int. Electron Device Meet. 1997, 171; 924.Google Scholar
3. Nakajima, A., Futatsugi, T., Kosenuma, K., Fukano, T., and Yokoyama, N., Int. Electron Device Meet. 1996, 952.Google Scholar
4. Guo, L., Appl. Phys. Lett. 70, 850 (1997).Google Scholar
5. Shi, Y., Yuan, X.L., Wu, J., Hu, L. Q., Gu, S. L., Zhang, R., Shen, B., Hiramoto, T. and Zheng, Y. D., First Joint Symposium on Opto- and Microelectronic Devices and Circuits 2000, 142.Google Scholar
6. Yang, H. G., Shi, Y., Pu, L., Gu, S. L., Shen, B., Han, P., Zhang, R., and Zhang, Y. D., Microelectronics Journal 34, 71 (2003).Google Scholar
7. Thean, A., and Leburton, J. P., IEEE Potentials, Oct./Nov., 35 (2002).Google Scholar
8. Sze, S. M., Physics of Semiconductor Devices, 2nd Edition, (Wiley, New York, 1981), p. 392.Google Scholar
9. Hinds, B. J., Yamanaka, T., and Oda, S., J. Appl. Phys. 90, 6402 (2001)Google Scholar
10. Nakajima, A., Futatsugi, T., Kosemura, K., Fukano, T., and Yokoyama, N., J. Vac. Sci. Technol. B17(5), 2163 (1999).Google Scholar