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In-Situ Doped Multi-Layer Epitaxial Structures with Abrupt Doping Transitions by Ultra High Vacuum Rapid Thermal Chemical Vapor Deposition (UHV-RTCVD)

Published online by Cambridge University Press:  22 February 2011

Mehmet C. ÅztÖjrk
Affiliation:
North Carolina State University, Department of Electrical and Computer Engineering, Box 7911, Raleigh, NC 27695-7911
Ibrahim Ban
Affiliation:
North Carolina State University, Department of Electrical and Computer Engineering, Box 7911, Raleigh, NC 27695-7911
Gari Harris
Affiliation:
North Carolina State University, Department of Electrical and Computer Engineering, Box 7911, Raleigh, NC 27695-7911
Mahesh K. Sanganeria
Affiliation:
North Carolina State University, Department of Electrical and Computer Engineering, Box 7911, Raleigh, NC 27695-7911
Katherine E. Violette
Affiliation:
North Carolina State University, Department of Electrical and Computer Engineering, Box 7911, Raleigh, NC 27695-7911
Archie Lee
Affiliation:
North Carolina State University, Department of Electrical and Computer Engineering, Box 7911, Raleigh, NC 27695-7911
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Abstract

In this work, we have studied boron doped multi-layer epitaxial structures as active regions of deep submicron (< 0.25 gtm)metal oxide silicon field effect transistors (MOSFETs).The structures were formed by ultra high vacuum chemical vapor deposition (UHV-RTCVD) using Si2H6 and B2H6 as the source gases and H2 as the carrier gas at 750°C - 800°C and at a total pressure of 80 mTorr. With the high growth rates provided by Si2H6, thermal budgets were kept below the limit of boron diffusion in Si resulting in extremely abrupt doping transitions pushing the depth resolution limits of secondary ion mass spectroscopy. The structures consist of three epitaxial layers with thicknesses ranging from 100 A to 625 T. The top layer on which the gate oxide is formed is lightly doped (lxl016 cm-3) to minimize vertical electrical field and ionized impurity scattering for higher MOSFET channel mobility. The second layer is doped to lx1018 cm-3 for suppression of punchthrough short channel effects and finally the third layer is doped to lx 1017 cm-3 to decrease the parasitic source/drain junction capacitance that will result from the relatively high doping density of the intermediate layer. To minimize dopant diffusion in Si, low temperature (or low thermal budget) processes were employed for gate oxidation and polysilicon implant activation. A typical source/drain activation anneal was also included in sample preparation in order to simulate complete MOSFET fabrication assuming remaining steps could be carried out at lower temperatures with little contribution to dopant diffusion. Our results indicate that after all process steps a lightly doped region can still be obtained under the gate oxide with sufficient thickness to contain the MOSFET inversion layer. In these structures, the threshold voltage is determined by the doping density and thickness of the top two layers and can be easily tailored to the desired value by optimizing these parameters. With the range of parameters used in this study, our measurements show threshold voltages within the range desired for 0.1 µm MOSFETs.

Type
Research Article
Copyright
Copyright © Materials Research Society 1994

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References

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