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Nist Program on Measurements of the Properties of Materials in Electronic Packaging

Published online by Cambridge University Press:  25 February 2011

Joseph A. Carpenter Jr.
Joseph A. Carpenter Jr.*
Affiliation:
Materials Science and Engineering Laboratory, National Institute of Standards and Technology, Gaithersburg, MD 20899
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Abstract

Reduction in the feature sizes of electronic chips is forcing a commensurate decrease inthe sizes of the various structures in packaging so that the assumption that the materials of the structures have bulk properties is suspect, especially near the interfaces. Historically, packaging has not received research and development as sophisticated as thatof the chip, so a collection of techniques specific to packaging technology has not beendeveloped. The National Institute of Standards and Technology (NIST) has identified the need for and initiated efforts to develop and refine such techniques. This paper will discuss the current NIST program and plans which were developed in conjunction with industry and other government agencies. Initial attention is given to measurements of the electrical, thermal, mechanical, and chemical properties of all types of materials used in the packaging.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 203: Symposium D – Electronic Packaging Materials Science V , 1990 , 119
Copyright
Copyright © Materials Research Society 1991

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References

REFERENCES

1. McCall, D. W., chairman, Materials for High-Density Electronic Packaging and Interconnection, Report of the Committee on Materials for High-Density Electronic Packaging, National Materials Advisory Board, Commission on Engineering and Technical Systems, the National Research Council (NMAB-449, National Academy Press, Washington, DC, 1990).Google Scholar
2. Kurtz, B. E., editor, Electronics Packaging/Interconnect: The Next Crisis for Cost-effective Military Electronics (National Semiconductor Industries Association, Washington, DC, 1990).Google Scholar
3. Tummala, R. R. and Rymaszewski, E. J., eds., Microelectronics Packaging Handbook (Van Nostrand Reinhold, New York, 1989).Google Scholar
4. Hinges, M. L., technical chairman, Electronic Materials Handbook. Vol, 1. Packagins (ASH International, Metals Park, Ohio, 1989).Google Scholar
5. Seraphim, D. P., Lasky, C., and Li, C.-Y., editors, Principles of Electronic Packaging. Design and Materials Science (McCraw-Hill Book Company, New York, 1989).Google Scholar
6. Harman, C. G., Wire Bonding in Microelectronics (International Society for Hybrid Microelectronics, Reston, Virginia, 1989).Google Scholar
7. Carpenter, J. A. Jr., Workshop Coordinator, Measurements of the Properties of Materials in Microelectronics Packaging, Report of a Workshop Conducted by the National Institute of Standards and Technology, May 1-3, 1990, National Institute of Standards and Technology, Gaithersburg, Maryland 20899. To be published.Google Scholar
8. Meieran, E. S., Flinn, P. A., and Carruthers, J. R., Proceedings of the IEEE, 25 (7), 908 (1987).Google Scholar
9. Kashar, L., in Electronics Packaging Forum. Volume One, edited by Morris, J. E. (Van Nostrand Reinhold, New York, 1990), p. 219.Google Scholar
10. There is currently some ambiguity in the electronics literature to the term “thin film.” While chip technologists usually mean layers with thicknesses from a few tenths of nanometers (nm) up to a few micrometers, packaging technologists usually mean layers with thicknesses on the order of a few to a few tens of micrometers. It is the latter size that is meant by references to thin films in this paper. The common factor in the use of the term “thin film” by both the chip and packaging technologist seems to be that similar techniques such as chemical vapor deposition or sputtering are used to fabricate the conducting and dielectric layers rather than “thick film” fabrication techniques typically involving slurries and powders that produce layers with thicknesses from a few ten to a few hundreds of micrometers. For a good discussion see pages 673-676 of reference 3.Google Scholar
11. Carpenter, J. A. Jr., in Microwave Processing of Materials, edited by Snyder, W. B., Sutton, W. H., Johnson, D. L., and Iskander, M. F. (Mater. Res. Soc. Proc., Pittsburgh, PA, to be published in 1991).Google Scholar