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Low-Temperature Solid-Phase Epitaxy of Defect-Free Aluminum p+-doped Silicon for Nanoscale Device Applications

Published online by Cambridge University Press:  01 February 2011

Yann Civale
Affiliation:
y.civale@dimes.tudelft.nl, Delft University of Technology, DIMES - Laboratory of ECTM, Feldmannweg 17, Delft, N/A, 2628 CT, Netherlands, +31 15 27 82185, +31 15 26 22613
Lis K. Nanver
Affiliation:
nanver@dimes.tudelft.nl, Delft University of Technology, DIMES - Laboratory of ECTM, Feldmannweg 17, Delft, N/A, 2628 CT, Netherlands
Peter Hadley
Affiliation:
hadley@med.tn.tudelft.nl, Delft University of Technology, Kavli Institute of Nanoscience, Lorentzweg 1, Delft, N/A, 2628 CJ, Netherlands
Egbert J. G. Goudena
Affiliation:
goudena@dimes.tudelft.nl, Delft University of Technology, DIMES - Laboratory of ECTM, Feldmannweg 17, Delft, N/A, 2628 CT, Netherlands
Henk W. van Zeijl
Affiliation:
henkz@dimes.tudelft.nl, Delft University of Technology, DIMES - Laboratory of ECTM, Feldmannweg 17, Delft, N/A, 2628 CT, Netherlands
Hugo Schellevis
Affiliation:
schelvis@dimes.tudelft.nl, Delft University of Technology, DIMES - Laboratory of ECTM, Feldmannweg 17, Delft, N/A, 2628 CT, Netherlands
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Abstract

A solid phase epitaxy (SPE) technique was developed to grow p+ aluminum-doped crystalline Si in a fully CMOS compatible process. This paper describes the experimental conditions leading to the selective growth of nanoscale single crystals where the location and dimensions are well controlled, even in the sub-100 nm range. The SPE Si crystals are defined by conventional lithography, show excellent electrical characteristics, and are uniform over the whole wafer. Fifty nanometer thick p+ SPE Si crystals were used to fabricate p+-n diodes and p+-n-p bipolar junction transistors. The high quality of the SPE Si and the remarkable control of the whole process, even in the sub-100 nm range, make this module directly usable for Si-based nanodevices.

Type
Research Article
Copyright
Copyright © Materials Research Society 2006

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