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Optimization of the Ast Hot Liner™ for Sub-Micron Production

Published online by Cambridge University Press:  10 February 2011

Terrence J. Riley
Affiliation:
Advanced Micro Devices, Austin, TX
Rolf Bremensdorfer
Affiliation:
AST Elektronik USA, Tempe, AZ
Steve Marcus
Affiliation:
AST Elektronik USA, Tempe, AZ
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Abstract

In an effort to develop an emissivity independent temperature measurement technique for the AST Rapid Thermal Processor (RTP), AST has conceived of the Hot Liner™. The Hot Liner is a silicon nitride coated silicon wafer which is permanently installed in the process chamber, immediately below the wafer. The pyrometer, which is calibrated to a production wafer, views the constant emissivity Hot Liner to produce repeatable temperatures on product wafers regardless of their backside emissivity.

Given the repeatability of the Hot Liner, the wafer temperature uniformity must then be optimized in order to achieve 0.25μm capable processing. AST has developed a methodology which incorporates process monitors (ion implanted test wafers) to establish process uniformity in addition to multiple thermocouple wafers to verify across wafer temperature uniformity. The process monitors are used to separately optimize the ramp and steady state steps in the production recipe.

Utilizing the AST methodology to optimize processing with the Hot Liner has allowed AMD to significantly improve its RTA processing. The Hot Liner greatly decreases backside and pyrometer effects which yields limited wafer to wafer variation (< 5C, 3σ). In combination with the optimization process this results in excellent within wafer uniformity (< 3C, 3σ).

Type
Research Article
Copyright
Copyright © Materials Research Society 1997

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References

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