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Practical Aspects of Forming Ultra-Shallow Junctions by Sub-keV Boron Implants

Published online by Cambridge University Press:  10 February 2011

M. A. Foad ,
A. J. Murrell ,
E. J. H. Collart ,
G. de Cock ,
D. Jennings  and
M. I. Current
M. A. Foad
Affiliation:
Applied Materials, Thermal Processing and Implant Divisions 3050 Bowers Avenue. Santa Clara, CA 95054 USA.
A. J. Murrell
Affiliation:
Applied Materials, Thermal Processing and Implant Divisions 3050 Bowers Avenue. Santa Clara, CA 95054 USA.
E. J. H. Collart
Affiliation:
Applied Materials, Thermal Processing and Implant Divisions 3050 Bowers Avenue. Santa Clara, CA 95054 USA.
G. de Cock
Affiliation:
Applied Materials, Thermal Processing and Implant Divisions 3050 Bowers Avenue. Santa Clara, CA 95054 USA.
D. Jennings
Affiliation:
Applied Materials, Thermal Processing and Implant Divisions 3050 Bowers Avenue. Santa Clara, CA 95054 USA.
M. I. Current
Affiliation:
Michael Current Scientific, 1729Comstock Way, San Jose, CA 95124 USA
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Abstract

As the drive towards the production of 100 nm CMOS devices pick up speed, the practical aspect of transistor shallow junction formation, including a large menu of process integration issues, must now be solved in a short order. The most direct path to 50 nm junction depths is through the sub-keV boron implantation and rapid thermal annealing.

The material aspects of the process integration centers on: (1) CMOS devices for shallow, highly-activated and abrupt junctions (involving the choice of ion species [B, BF, B10H14, BSi2, etc.], substrate materials [ Cz, Epi, SOI], anneal conditions [ramp rate, soak time, ambient gas], etc.) and (2) Defect-dopant interactions during annealing (including surface reactions of high concentration species [B, F], diffusion and carrier trapping by background and co-implanted species [C, 0, F, etc.].

Process data for atomic and electrical activity profiles as well as defect and interface structures will be presented to illustrate progress towards understanding these complex process interactions. A particular focus will be the effects of anneal ambient and rapid temperature rise times approaching the “pike” anneal ideal.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 568: Symposium S – Silicon Front-End Processing-Physics & Technology of Dopant… , 1999 , 55
Copyright
Copyright © Materials Research Society 1999

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References

REFERENCES

1. Semiconductor Industry Association, ’The National Technology Roadmap for Semiconductors”. (1997) Edition.Google Scholar
2. Collart, E. J. H., Murrell, A. J., Cock, G. de, Foad, M. A., Schmitz, J., ZijI, J. P. van, and Berkum, J. G. van, Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar
3. Foad, M. A., Webb, R., Smith, R., Jones, E., A. A1-Bayati, Lee, M., Agarwal, V., Benerjee, S., Matsuo, J., and Yamada, I., Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar
4. Banks, P., Dobson, M., Krimbacher, B., Allen, A. and Murrell, A., Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar
5. Murrell, A. J., Collart, E. J. H., Foad, M. A., Cock, G. de, DowseRt, M., Elliner, D., Wang, T.-S., and Cullis, T., Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar
6. Mineji, A., Shishiguchi, S., Matsuda, T., and Saito, S., Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar
7. Webb, R. P., Foad, M. A., Gwilliam, R. M., Kmnights, A. P., and Thomas, G., Mat. Res Soc. Symp Proc. Vol.469, p. 59 (1997).Google Scholar
8. Lim, D. R., Rafferty, C. S., and Klemens, F. P., Appli. Phys. Lett. 67, p. 2302 (1995).Google Scholar
9. Agarwal, A., Gossmann, H. J., Eaglesham, D. J., Pelaz, L., Jackobson, D. C., Haynes, T. E., Erokhin, Yu. E., Appl. Phys. Lett. 71, p. 3141 (1997).Google Scholar
10. Downey, D. et al, MRS Spring meeting, San Francisco, April (1998).Google Scholar
11. Shishiguchi, S., Mineji, A., Hayashi, T., and Saito, S., VLSI Technology Tech. Dig., p. 98 (1997).Google Scholar
12. Priolo, F., Mannino, G., Micciche, M., Privitera, V., Napolitani, E., and Camera, A., Appl. Phys. Lett. 72, p. 3011 (1998).Google Scholar
13. Privitera, V., Priolo, F., Mannino, G., Napolitani, E., and Camera, A., Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar
14. Lur, W., and Chen, L. J., J. Appl. Phys., 66, p. 3604 (1989).Google Scholar
15. Lur, W., and Chen, L. J., J. Appl. Phys., 64, p. 3505 (1988).Google Scholar
16. Goto, K., Matsuo, J., Sugii, T., Minakata, H., Yamada, I., and Hisatsugu, T., IEDM proc. pp. 435–438 (1996).Google Scholar
17. , Ling, Strathman, M., Ling, C. H., Doyle, B., Walsh, D., Larson, L., Bennett, J., and Felch, S., Presented in Ion Implantation Technology conference98, June (1998), Kyoto, Japan.Google Scholar