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Screening the High-k Layer Quality by Means of Open Circuit Potential Analysis and Wet Chemical Etching

Published online by Cambridge University Press:  11 February 2011

Martine Claes ,
Stefan De Gendt ,
Thomas Witters ,
Vidya Kaushik ,
Jerry Chen ,
Thierry Conard ,
Annelies Delabie ,
Sven Van Elshocht  and
Marc Heyns
Martine Claes
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
Stefan De Gendt
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
Thomas Witters
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
Vidya Kaushik
Affiliation:
ISMT Industrial Affiliate at IMEC
Jerry Chen
Affiliation:
ISMT Industrial Affiliate at IMEC
Thierry Conard
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
Annelies Delabie
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
Sven Van Elshocht
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
Marc Heyns
Affiliation:
IMEC, Kapeldreef 75, B-3001 Heverlee, Belgium
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Abstract

A fast way to monitor the quality of high-k dielectric layers is wet etching, either monitored by Open Circuit Potential analysis or by Scanning Electron Microscopy. Defect densities in the order of 1.109 defects/cm2 are observed for as-deposited HfO2 layers. It is assumed that the mechanism for wet chemical defect observation is either due to crystallization and/or due to an oxygen deficient HfO2 layer resulting in Si/SiO up-diffusion upon thermal treatment. However, after appropriate post deposition annealing wet etch defect free layers can be prepared.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 745: Symposium N – Novel Materials and Processes for Advanced CMOS , 2002 , N1.8
Copyright
Copyright © Materials Research Society 2003

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References

REFERENCES

[1] Morrison, S.R., Electrochemistry at Semiconductor and Oxidized Metal Electrodes, 1st ed. (Plenum Press, New York, 1980) p. 79.Google Scholar
[2] Claes, M. et al., presented at the 2002 UCPSS conference, Oostende, Belgium, 2002 (to be published in the proceedings).Google Scholar
[3] Bender, H. et al., presented at IWGI workshop, Japan, November 2001.Google Scholar
[4] Zhao, C. et al., in Novel Materials and Processes for advanced CMOS, edited by Maria, J-P., Stemmer, S., De Gendt, S. and Gardner, M. (Mater. Res. Soc. Proc., 745 Symposium N – Novel Materials and Processes for Advanced CMOS, Pittsburgh PA, 2002 (this meeting)).Google Scholar
[5] Okorn-Schmidt, H.F. et al., in Analytical Techniques for Semiconductor Materials and Process Characterization II, edited by Kolbesen, B.O., Claeys, C. and Stallhofer, P., (Electrochem. Soc. Proc. 95–30, The Hague, Netherlands, 1995) pp. 316–327.Google Scholar
[6] Van Elshocht, S. et al., in Novel Materials and Processes for advanced CMOS, edited by Maria, J-P., Stemmer, S., De Gendt, S. and Gardner, M. (Mater. Res. Soc. Proc., 745 Symposium N – Novel Materials and Processes for Advanced CMOS, Pittsburgh PA, 2002 (this meeting)).Google Scholar
[7] Zhao, C. et al., in Euro Ceramics VII, Proc. of the 7th Conference & Exhibition of the European Ceramic Society, Trans Tech Publications, (Key Engineering Materials, 206–213, Switzerland, 2002) pp. 1285–1288.Google Scholar
[8] Aarik, J. et al., Thin Solid Films,Google Scholar
[9] Harada, Y. et al., presented at the 2002 Symposium on VLSI Technology, Honolulu, Hawaii (2002).Google Scholar
[10] Cho, M. et al., Appl. Phys. Lett. 81 (2), 334 (2002).Google Scholar