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Dual Work Function CMOS Gate Technology Based on Metal Interdiffusion

Published online by Cambridge University Press:  21 March 2011

Igor Polishchuk ,
Pushkar Ranade ,
Tsu-Jae King  and
Chenming Hu
Igor Polishchuk
Affiliation:
Department of Electrical Engineering and Computer Sciences University of California at Berkeley, Berkeley, CA 94720
Pushkar Ranade
Affiliation:
Department of Electrical Engineering and Computer Sciences University of California at Berkeley, Berkeley, CA 94720
Tsu-Jae King
Affiliation:
Department of Electrical Engineering and Computer Sciences University of California at Berkeley, Berkeley, CA 94720
Chenming Hu
Affiliation:
Department of Electrical Engineering and Computer Sciences University of California at Berkeley, Berkeley, CA 94720
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Abstract

In this paper we propose a new metal-gate CMOS technology that uses a combination of two metals to achieve a low threshold voltage for both n- and p-MOSFET's. One of the gate electrodes is formed by metal interdiffusion so that no metal has to be etched away from the gate dielectric surface. Consequently, this process does not compromise the integrity and electrical reliability of the gate dielectric. This new technology is demonstrated for the Ti-Ni metal combination that produces gate electrodes with 3.9 eV and 5.3 eV work functions for n-MOS and p-MOS devices respectively.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 670: Symposium K – Gate Stack and Sillicide Issues in Silicon , 2001 , K5.1
Copyright
Copyright © Materials Research Society 2001

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References

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