The Far-ultraviolet IMaging Spectrograph (FIMS) is a small spectrograph optimized for the observations of diffuse hot interstellar medium in far-ultraviolet wavebands (900–1150Å and 1335–1750Å). The instrument is expected to be sensitive to emission line fluxes an order of magnitude fainter than any previous missions. FIMS is currently under development and is scheduled for launch in 2002.

The highly strained interfacial structure and reaction of Co on Si(111) in the initial growth stage was studied by in-situ surface x-ray scattering. Co was deposited on Si(111) – (7×7) reconstruction by electron beam evaporation in ultra high vacuum. Our study reveals that the interfacial layer, formed by the reaction of Co with Si in the initial growth stage at room temperature, is a silicide layer with stoichiometry of Co2Si. The interfacial silicide layer is a commensurate phase of pseudohexagonal Co2Si, which shows a significant local atomic displacements imposed by Si substrate. The intensity oscillations at the anti-Bragg position with Co coverage show that a layer-by-layer consumption of silicon substrate occurs for the first 15 monolayers (ML) of Co deposited.

The degradation behavior of integrated Pt/SrBi2Ta2O9/Pt capacitors caused by hydrogen impregnation during the spin-on glass (SOG)-based intermetal dielectric (IMD) process was investigated. SOG was tested as an IMD since it offers better planarity for multilevel metallization processes compared to other SiO2 deposition methods. It was found that the SOG itself does not degrade the ferroelectric performance. Deposition of an under-layer of SiOxNy by plasma-enhanced chemical vapor deposition (PECVD) using SiH4 + N2O + N2 source gases and a SiO2?x capping layer by another PECVD process using SiH4 + N2O source gases produced hydrogen as a reaction by-product. The hydrogen diffused into the SBT layer and degraded the ferroelectric performance during subsequent annealing cycles. A very thin (10 nm) Al2O3 layer grown by atomic layer deposition before the IMD process successfully blocked the impregnation of the hydrogen. Therefore, excellent ferroelectric performance of the SBT capacitors were maintained after the multilevel metallization process as well as passivation. The adoption of SOG in the IMD process greatly improved the surface flatness of the wafer resulting in a higher capacitor yield with very good uniformity in ferroelectric properties over the 8-in.-diameter wafer.

We have grown well-aligned carbon nanotube arrays by thermal chemical vapor deposition at 800°C on Fe nanoparticles deposited by a pulsed laser on a porous Si substrate. Porous Si substrates were prepared by the electrochemical etching of p-Si(100) wafers with resistivities of 3 to 6 ωcm. These well-aligned carbon nanotube field emitter arrays are suitable for electron emission applications such as cold-cathode flat panel displays and vacuum microelectronic devices like microwave power amplifier tubes. Field emission characterization has been performed on the CNT-cathode diode device at room temperature and in a vacuum chamber below 10−6 Torr. The anode is maintained at a distance of 60[.proportional]m away from the carbon nanotube cathode arrays through an insulating spacer of polyvinyl film. The measured field emitting area is 4.0×10−5cm2. Our carbon nanotube field emitter arrays emit 1mA/cm2at the electric field, 2V/[.proportional]m. And they emit a large current density as high as 80mA/cm2 at 3V/[.proportional]m. The open tip structure of our carbon nanotubes and their good adhesion through Fe nanoparticles to the Si substrate are part of the reason why we can attain a large field emission current density within a low field. The field emitter arrays in our diode device are vertically well-aligned carbon nanotubes on the Si-wafer substrate.

We investigated the solid phase crystallization (SPC) behavior of 1000 Å amorphous Si (a- Si) films deposited by plasma enhanced chemical vapor deposition (PECVD) at various temperatures and were able to enhance the grain size of the crystallized polysilicon films using double layers of a-Si filns. The deposition temperature of monolayer a-Si films varied from 200 to 400 °C and the films were recrystallized at 600 °C in nitrogen. As the deposition temperature increased, the incubation time was decreased and both the nucleation rate and growth rate were increased. Especially, the nucleation rate strongly depended on the deposition temperature.

Since the Si-SiO2 interface provides a large number of nucleation sites, it is desirable to suppress nucleation at the interface. As an idea we employed a structure with double layer a-Si films. The bottom a-Si layer deposited at lower temperature could suppress the nucleation at the Si-SiO2 interface while the top a-Si layer deposited at higher temperature could nucleate with a smaller number of nucleation sites. The incubation time and transformation behavior were determined by the deposition temperature of the top layer. As an example, the grain size of the double layer film deposited sequentially at 150 °C and 200 °C enhanced to 1.8 μm while that of the monolayer film deposited at 200 °C was 1.4 μm.

A new annealing method, a combination of rapid thermal annealing (RTA) and furnace annealing, has been developed to obtain a high quality poly-Si from a-Si deposited by LPCVD. This method produces a large grain poly-Si with good uniformity, which may result from the growth of relatively defect-free nucleus generated at a high temperature by RTA. Poly-Si thin film transistors fabricated by this new annealing method have higher field effect mobility and better uniformity compared with those by the conventional furnace annealing.

Prior to growth of polyoxide, amorphous-Si with a cap of low temperature oxide was annealed to improve the dielectric property of polyoxide. Current-electric field, critical electric field, critical electric field histogram, and Fowler-Nordheim conduction plot were evaluated. The interface of polyoxide and poly-Si was observed with a transmission electron microscope. The annealing of the amorphous-Si prior to oxidation was effective to improve the dielectric property of the polyoxide.