In this paper we investigate the carriers mobility enhancement of the n- and p-channel single-grain silicon thin-film transistors (SG-TFTs) by μ-Czochralski process at low-temperature process (< 350 °C). The high laser energy density nearby the ablation phenomenon that completely melts the silicon layer during the crystallization is responsible for high tensile strain and good crystal quality of the silicon grains, which lead carriers mobility enhancement.

Vertical stacking of transistors is a promising technology which can realize compact and high-speed integrated circuits (ICs) with a short interconnect delay and increased functionality. Two layers of low-temperature fabricated single-grain thin-film transistors (SG TFTs) have been monolithically integrated. NMOS mobilities are 565 and 393 cm2/Vs and pMOS mobilities are 159 and 141 cm2/Vs, for the top and bottom layers respectively. A three-dimensional (3D) inverter has also been fabricated, with one transistor on the bottom layer and the other on the top layer. The inverters showed an output voltage swing of 0 to 5 V with a switching voltage of around 2 V.

Thin film transistors (TFTs) are fabricated inside a large, location-controlled, silicon grain, fabricated with the grain-filter method. In a first experiment TFTs with high field-effect mobility for electrons of 430 cm2/Vs are fabricated. The off-current and subthreshold swing have high values of 60 pA and 1.2 V/dec, respectively. The grain-filter is improved by doping the channel and by planarizing the grain-filter by chemical mechanical polishing (CMP). TFTs fabricated in CMP-planarized grain-filters have mobility, off-current, and subthreshold swing of 430 cm2/Vs, 0.3 pA, and 0.29 V/dec, respectively, which compares well with the characteristics for SOI TFTs.

Large grains in thin silicon films were grown by controlling the location of unmolten islands, which are left after near-complete melting of the film during excimer laser crystallization. As the initially amorphous film was first transformed in small grain polycrystalline silicon, these islands contain seeds for crystal growth. To get a single large grain, either the number of seeds was reduced to one or a single one was selected from the seeds by a ‘grain filter’. Former was achieved by making a small indentation in the isolating layer underlying the silicon film so that seeds remain embedded in the indentation. Latter was achieved by making a small diameter hole in the underlying isolating layer, which was filled with amorphous silicon. The lateral growth is preceded by a vertical growth phase during which a single grain is filtered from the initial set of seeds present at the bottom of the hole. In the experiment described, highest yield was achieved for samples in which the melt-depth to hole- diameter ratio was largest.

The offset of the underlying TiW is introduced in the island of Si, SiO2 and TiW on glass. During the dual-beam excimer-irradiation to the Si and the TiW, the offset in TiW acts as an extra heat source, which melts completely the Si film near the edge, whereas the Si inside is partially melted. The laterally columnar Si grains with a length of 3.2 μm were grown from the inside of the island towards the edge. By changing the shape of the edge, the direction of the solidification of the grain was successfully controlled in such a way that the all grain-boundaries are directed towards the edge and a single grain expands. The grain-boundary-free area as large as 4 μm × 3 μm was obtained at a predetermined position of glass.

Silicon nitride films have been successfully deposited at a temperature as low as 300°C by chemical-vapor-deposition using tctra-silane (Si4 H10) and hydrogen azidc (HN3). Atomic ratio (N/Si) of the film deposited at 400°C was 1.47, i.e., the film was N-rich. Total hydrogen content was about 25atomic%. The breakdown-field strength was 6.5MV/cm at leakage-current density of 1μA/cm2, and the low-field resistivity was more than 1015 Ωcm. Similar electrical characteristics were obtained from films deposited at a temperature range between 300°C and 500°C. Amorphous silicon thin-film transistors equipped with this film as the gate dielectric showed good transfer characteristics.