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Home > Catalog > Arithmetic Optimization Techniques for Hardware and Software Design
Arithmetic Optimization Techniques for Hardware and Software Design


  • 13 tables
  • Page extent: 200 pages
  • Size: 247 x 174 mm
  • Weight: 0.55 kg

Library of Congress

  • Dewey number: 004.01/5196
  • Dewey version: 22
  • LC Classification: QA76.9.C62 K37 2010
  • LC Subject headings:
    • Computer arithmetic
    • Electronic digital computers--Design and construction
    • Computer software--Development
    • Mathematical optimization

Library of Congress Record

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 (ISBN-13: 9780521880992)

In stock

$140.00 (C)

Obtain better system performance, lower energy consumption, and avoid hand-coding arithmetic functions with this concise guide to automated optimization techniques for hardware and software design. High-level compiler optimizations and high-speed architectures for implementing FIR filters are covered, which can improve performance in communications, signal processing, computer graphics, and cryptography. Clearly explained algorithms and illustrative examples throughout make it easy to understand the techniques and write software for their implementation. Background information on the synthesis of arithmetic expressions and computer arithmetic is also included, making the book ideal for newcomers to the subject. This is an invaluable resource for researchers, professionals, and graduate students working in system level design and automation, compilers, and VLSI CAD.


Preface; 1. Introduction; 2. Use of polynomial expressions and linear systems; 3. Software compilation; 4. Hardware synthesis; 5. Fundamentals of digital arithmetic; 6. Polynomial expressions; 7. Linear systems.

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