Hostname: page-component-78c5997874-lj6df Total loading time: 0 Render date: 2024-10-31T23:30:28.345Z Has data issue: false hasContentIssue false

Sub-30 nm FinFETs with Schottky-Barrier Source/Drain Featuring Complementary Metal Silicides and Fully-Silicided Gate for P-FinFETs

Published online by Cambridge University Press:  01 February 2011

Rinus Tek Po Lee
Affiliation:
rinuslee@ieee.org, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Kian-Ming Tan
Affiliation:
g0402599@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Tsung-Yang Liow
Affiliation:
g0301490@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Andy Eu-Jin Lim
Affiliation:
g0404227@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Guo-Qiang Lo
Affiliation:
logq@ime.a-star.edu.sg, Institute of Microelectronics, 11 Science Park, Singapore, 117685, Singapore
Ganesh S. Samudra
Affiliation:
eleshanr@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Dong-Zhi Chi
Affiliation:
dz-chi@imre.a-star.edu.sg, Institute of Materials Research and Engineering, 3 Research Link, Singapore, 117602, Singapore
Yee-Chia Yeo
Affiliation:
eleyeoyc@nus.edu.sg, National University of Singapore, Electrical and Computer Engineering, Block E4A #02-04 Engineering Drive 3, Singapore, 117576, Singapore
Get access

Abstract

We investigated the material and electrical characteristics of platinum and ytterbium silicides for potential applications as metallic Schottky-barrier source/drain (S/D) and fully-silicided (FUSI) gate electrodes in fin field-effect transistors (FinFETs). Due to the low electro-negativity parameter of ytterbium, a low temperature silicidation process was developed to avoid the reaction of ytterbium with the isolation regions (i.e. SiO2 and SiN) to integrate ytterbium silicide successfully in mesa-isolated n-FinFETs. The integration of FUSI metal gate into p-FinFETs was also explored in this work and a novel two-step silicidation process that integrates simultaneously two different phases of platinum silicide with the appropriate work function values for gate electrode and source/drain application was demonstrated.

Type
Research Article
Copyright
Copyright © Materials Research Society 2007

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

1. Hisamoto, D., Kaga, T., Kawamoto, Y., and Takedea, E., “A fully depleted lean-channel transistor (DELTA)– A novel vertical ultra thin SOI MOSFET,” IEDM Tech. Dig., pp. 833836, Dec. 1989.Google Scholar
2. Larson, J.M., Snyder, J.P., “Overview and status of metal S/D Schottky-barrier MOSFET technology,” IEEE Trans. Electron Dev., vol. 53, no.5 pp. 10481058, Jun 2006.Google Scholar
3. Kedzierski, J., Xuan, P., Anderson, E.H., Bokor, J., King, T.-J., Hu, C., “Complementary silicide source/drain thin-body MOSFETs for the 20 nm gate length regime,” IEDM Tech. Dig., pp. 5760, Dec. 2000.Google Scholar
4. Zhu, S. Y., Chen, J.D., Li, M.F., Lee, S.J., Singh, J., Zhu, C.X., Du, A., Tung, C. H., Chin, A., Kwong, D.L., “N-Type Schottky-barrier source/drain MOSFET using Ytterbium Silicide,” IEEE Electron Dev. Lett, vol. 25 no. 8, pp. 565567, Aug. 2004.Google Scholar
5. Lee, R.T.P., Lim, A.E.J., Tan, K.M., Liow, T.Y., Lo, G.Q., Samudra, G.S., Chi, D.Z. and Yeo, Y.C., “N-channel FinFETs with 25-nm Gate Length and Schottky-Barrier Source and Drain Featuring Ytterbium Silicide,” IEEE Electron Dev. Lett, vol. 28 no. 2, pp. 164167, Feb. 2007.Google Scholar
6. Nabatame, T., Kadoshima, M., Iwamoto, K., Mise, N., Migita, S., Ohno, M.,Ota, ., Yashuda, N., Ogawa, A., Tominaga, K., Satake, H., and Toriumi, A., “Partial silicides technology for tunable work function electrodes on high-k gate dielectrics Fermi level pinning controlled PtSixfor HfOx(N) pMOSFET,” IEDM Tech. Dig., pp. 8386, Dec. 2004.Google Scholar
7. Rand, M. J. and Roberts, J.F., “Observations on the formation and etching of platinum silicide,” Appl. Phys. Lett., vol. 24, pp. 4951, Jan. 1974.Google Scholar