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Curtaining-Free Top-Down TEM Lamella Preparation from a Cutting Edge Integrated Circuit

Published online by Cambridge University Press:  25 July 2016

Andrey Denisyuk ,
Tomáš Hrnčíř ,
Jozef Vincenc Oboňa ,
Martin Petrenec  and
Jan Michalička
Andrey Denisyuk
Affiliation:
TESCAN ORSAY HOLDING, Libušina třida 21, Brno, Czech Republic
Tomáš Hrnčíř
Affiliation:
TESCAN Brno, Libušina třida 1, Brno, Czech Republic
Jozef Vincenc Oboňa
Affiliation:
TESCAN Brno, Libušina třida 1, Brno, Czech Republic
Martin Petrenec
Affiliation:
TESCAN Brno, Libušina třida 1, Brno, Czech Republic
Jan Michalička
Affiliation:
TESCAN ORSAY HOLDING, Libušina třida 21, Brno, Czech Republic

Abstract

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Type
Abstract
Information
Microscopy and Microanalysis , Volume 22 , Supplement S3: Proceedings of Microscopy & Microanalysis 2016 , July 2016 , pp. 196 - 197
Copyright
© Microscopy Society of America 2016 

References

[1] http://www.itrs2.net/.Google Scholar
[2] Ugurlu, O, Strauss, M, Dutrow, G, Blackwood, J, Routh, B, Senowitz, C, Plachinda, P & Alvis, R Proc. of SPIE 8681 (2013). p. 868107.CrossRefGoogle Scholar
[3] http://www.intel.com/content/www/us/en/silicon-innovations/intel-14nm-technology.html.Google Scholar
[4] Hrnčíř, T, Dluhoš, J, Hladík, L, Moyal, E, Teshima, J & Kopecek, J 40th ISTFA Conf. Proc (2014). p. 136.Google Scholar