Hostname: page-component-848d4c4894-x5gtn Total loading time: 0 Render date: 2024-05-09T07:29:36.263Z Has data issue: false hasContentIssue false

SONOS Memories: Advances in Materials and Devices

Published online by Cambridge University Press:  06 February 2017

K. Ramkumar*
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
V. Prabhakar
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
Ali Keshavarzi
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
Igor Kouznetsov
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
Sam Geha
Affiliation:
Cypress Semiconductor, 3833 North First St, San Jose, CA 95134, U.S.A.
*
*(Email: ktr@cypress.com)
Get access

Abstract

Silicon Nitride based charge trap devices have been studied since the 1980s for applications in non-volatile memories. Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) stack as the non-volatile memory gate stack has been the focus since the 1990s. Several enhancements in SONOS layer materials have been invented to reduce the programming voltage and improve the reliability of the SONOS memory. SONOS memories are a widely used class of non-volatile memories today. This paper will review the history of SONOS and highlight the various innovations that have enhanced SONOS memory performance, reliability and low cost of manufacture. Topics covered include various improvements in the SONOS stack such as Band gap engineering, High K–Metal Gate for SONOS, 3D SONOS, SONOS FinFETs (Field Effect Transistor) and embedded SONOS.

Type
Articles
Copyright
Copyright © Materials Research Society 2017 

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

White, M. et al. , IEEE Trans. Components, Packaging and Manufacturing A, 20, 190 (1997)Google Scholar
Ramkumar, K. et al. , (IEEE Intl. Memory Workshop, 2013) pp. 199 Google Scholar
Meena, J.S. et al. , Nanoscale Letters, 526 (2014)Google Scholar
Kapoor, V.J. et al. J. Appl. Phys, 52, 311 (1981)Google Scholar
Lue, H.T. et al. , IEEE Electron Dev Lett, 25, 816 (2004)Google Scholar
Honda, K. et al. , (IEEE NVMTS, 2006) pp. 4 Google Scholar
Buckley, J. et al. ., (IEDM 2006), pp.1.Google Scholar
Tan, Y.N. et al. , (IEDM 2004), pp. 889 Google Scholar
Chang, K.T. et al. , IEEE Electron. Dev. Lett, 253 (1998)Google Scholar
Sridhar, et al. Proc. 12th IPFA, 2005, pp.190 Google Scholar
Bu, J. and White, M.H., IEEE Electron Dev Lett, 22, p.17 (2001)Google Scholar
Wu, J. et al. (IEEE IRW, 2006), pp.209 Google Scholar
Wang, S.Y. et al. , (IEEE IRPS, 2010), pp.951 Google Scholar
Vianello, E. et al. (IEEE ESSDERC 2008), pp.107 Google Scholar
Nasyrov, K. A. et al. , IEEE Electron Dev. Lett, 23, p. 336 (2002)CrossRefGoogle Scholar
Lue, H.T. et al. , (IEDM 2005), pp.547 Google Scholar
Chen, T.S. et al. , IEEE Electron Dev. Lett, p.205 (2004)CrossRefGoogle Scholar
Lee, C.H. et al. , (IEEE NVSMW), pp.55 Google Scholar
Shin, Y. et al. , (IEDM 2006), pp.1 Google Scholar
Duuren, M.V. et al. , (ICICDT, 2006), pp.1.Google Scholar
Molas, G. et al. , (Int. Symp. VLSI Technology Systems and Applications, 2010), pp. 56 Google Scholar
Van Schaijk, R., et al. , (NVSMW, 2006), pp.Google Scholar
Zhang, G. and Woo, W. J., (ISCICT, 2006), pp.781 Google Scholar
Chin, A. et al. IEEE Proc. 16th IPFA, 2009 Google Scholar
Muralidhar, R. et al. , (IEDM 2003), pp.601 Google Scholar
De Salvo, B., et al. , IEEE Trans. Dev and Material Reliability, 377 (2004)Google Scholar
Chiang, T.Y. et al. IEEE Trans. Electron Dev. 57, 1895 (2010)Google Scholar
Hsu, T.H. et al. , (IEDM, 2007), pp.913.Google Scholar
Park, K. et al. , (IEEE SSC 2015), pp.204 Google Scholar
Lue, H.T. et al. , (Symp. VLSI Technology 2010), pp.131 Google Scholar