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A-Si:H Thin Film Transistors and Logic Circuits Fabricated in an Integrated Multichamber System

Published online by Cambridge University Press:  25 February 2011

S. S. Kim ,
C. Wang ,
G. N. Parsons  and
G. Lucovsky
S. S. Kim
Affiliation:
North Carolina State University, Dept. of Physics, Raleigh, NC 27695, U.S.A.
C. Wang
Affiliation:
North Carolina State University, Dept. of Physics, Raleigh, NC 27695, U.S.A.
G. Lucovsky
Affiliation:
North Carolina State University, Dept. of Physics, Raleigh, NC 27695, U.S.A.
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Abstract

Hydrogenated amorphous silicon (a-Si:H) thin-film-transistors (TFT’s) and logic circuits have been fabricated using a simple 3-mask process. Inverted staggered TFT structures were prepared in a multichamber UHV-compatible system that provides: 1) sequential deposition of dielectrics, and intrinsic and doped a-Si:H by remote plasma-enhanced chemical-vapor deposition (Remote PECVD) in a single deposition chamber; 2) in-situ surface analysis by Auger Electron Spectroscopy (AES); and 3) dry etching of deposited thin films by Remote plasma-enhanced etching, Remote PEE. A field-effect electron mobility of 0.74 cm2/V-s, and a threshold voltage of 2.5 Volts have been measured at room temperature in the TFTs. The on/off current ratio of the TFT exceeds 106. The a-Si:H TFT logic circuits, 2-transistor inverters and addressable 6-transistor static memory cells, operate at a supply voltage of as low as 8 Volts. The experimental results indicate that high performance a-Si:H thin film devices can be fabricated by sequential Remote plasma processing in a multichamber integrated system.

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 192: Symposium O – Amorphous Silicon Technology - 1990 , 1990 , 373
Copyright
Copyright © Materials Research Society 1990

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References

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