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Flipchip Bonding of Si Chip on Flexible PEN Foil using Novel Electronic 100 μm Pitch Fan-out Circuitry

Published online by Cambridge University Press:  01 February 2011

Jeroen van den Brand
Affiliation:
jeroen.vandenbrand@tno.nl, TNO/Holst Centre, Lamination and Interconnection Technology, High Tech Campus 31, Eindhoven, 5656 AE, Netherlands, +31-40-2774061
Erik Veninga
Affiliation:
erik.veninga@tno.nl, TNO, De Rondom 1, Eindhoven, N/A, Netherlands
Roel Kusters
Affiliation:
roel.kusters@tno.nl, TNO, De Rondom 1, Eindhoven, N/A, Netherlands
Tomas Podprocky
Affiliation:
tomas.podprocky@elis.ugent.be, Imec Gent, TFCG, Grote Steenweg Noord, Gent, B9052, Belgium
Andreas Dietzel
Affiliation:
andreas.dietzel@tno.nl, Holst Centre/TNO, High Tech Campus 31, Eindhoven, 5656 AE, Netherlands
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Abstract

A novel, cost effective technology to manufacture high density embedded electronic circuitry is demonstrated. The process consists of laser photoablation of the circuitry into a substrate through a mask and subsequent filling using a polymer thick film paste. Because the volume of the substrate is used it is possible to make thick and thereby highly conductive lines using low cost materials and processes. The process is demonstrated for a fan out circuitry in 100 µm thick polyethylene naphthalate (PEN). The fan out circuitry has linewidths of 50 µm and line spacings of 100 µm. The usability of the circuitry is demonstrated by the successful flipchip bonding of a thinned Si daisy chain dummy chip with 176 IO's.

Type
Research Article
Copyright
Copyright © Materials Research Society 2008

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References

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