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Solid Phase Epitaxy process integration on 50-nm PMOS devices: Effects of defects on chemical and electrical characteristics of ultra shallow junctions

Published online by Cambridge University Press:  17 March 2011

R. El Farhane
Affiliation:
Philips Semiconductors Crolles, 860 rue Jean Monnet, 38920 Crolles, France
C. Laviron
Affiliation:
CEA-Leti, 17 rue des martyrs, 38054 Grenoble, France
F. Cristiano
Affiliation:
CEMES CNRS, 7 Avenue du Colonel Roche 31077 Toulouse, France, Email: rebha.el-farhane@philips.com; ph. 33.4.76.92.55.48; fax. 33.4.76.92.50.71
N. Cherkashin
Affiliation:
CEMES CNRS, 7 Avenue du Colonel Roche 31077 Toulouse, France, Email: rebha.el-farhane@philips.com; ph. 33.4.76.92.55.48; fax. 33.4.76.92.50.71
P. Morin
Affiliation:
STM Crolles, 850 rue Jean Monnet, 38920 Crolles, France
M. Juhel
Affiliation:
STM Crolles, 850 rue Jean Monnet, 38920 Crolles, France
P. Stolk
Affiliation:
Philips Semiconductors Crolles, 860 rue Jean Monnet, 38920 Crolles, France
F. Arnaud
Affiliation:
STM Crolles, 850 rue Jean Monnet, 38920 Crolles, France
A. Pouydebasque
Affiliation:
Philips Semiconductors Crolles, 860 rue Jean Monnet, 38920 Crolles, France
F. Wacquant
Affiliation:
STM Crolles, 850 rue Jean Monnet, 38920 Crolles, France
D. Lenoble
Affiliation:
STM Crolles, 850 rue Jean Monnet, 38920 Crolles, France
A. Halimaoui
Affiliation:
STM Crolles, 850 rue Jean Monnet, 38920 Crolles, France
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Abstract

We demonstrate in this paper the viability of an ultra-low thermal budget CMOS process enabling the formation of ultra shallow junctions with competitive transistor characteristics. In particular, we demonstrate in this work the influence of defects on chemical and electrical results. It is shown that the use of self-amorphizing implantation with BF2 for Source/Drain, reduces the junction leakage by two decades.

Type
Research Article
Copyright
Copyright © Materials Research Society 2004

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References

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