Copper metallization for on-chip multilevel interconnects is receiving increasing attention for future generations of ICs, with advantages of low line resistance, low interconnect delay, high electromigration resistance and, possibly, overall back-end process simplicity. However, copper introduces a set of processing and manufacturing issues which must be addressed in the research and development phases of the technology. This paper summarizes the most likely processing steps for integrating copper metallization into IC technology and presents the manufacturing issues (materials, unit processing and process integration issues) that need to be addressed.