This paper is the second part of a series of papers dealing with
realization theory of switched systems.
The current Part II addresses realization theory of bilinear switched
systems. In Part I [Petreczky, ESAIM: COCV, DOI: 10.1051/cocv/2010014] we presented realization
theory of linear switched systems.
More precisely, in Part II we present necessary and sufficient conditions
for a family of input-output maps to be
realizable by a bilinear switched system, together with a characterization
of minimal realizations.
Similarly to Part I, the paper deals with two types of switched systems.
The first one is when all switching sequences are allowed.
The second one is when only a subset of switching sequences is
admissible, but within this restricted set
the switching times are arbitrary.
The paper uses the theory of formal power series to derive
the results on realization theory.