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3-D Integration Latest Developments at LETI

  • Barbara Charlet (a1)
Abstract
ABSTRACT

We review the latest 3-D integration developments performed in LETI, giving some devices integration examples and discussing the achieved performances. Direct bonding and layer transfer (smart cut™) is now largely used to process innovative substrates like: SOI, SSOI, GeOI, … and others. This type of new substrate can play a crucial role in 3D structure integration and can answer the requirements for new challenging performances.

3-D integration approach has been used and will be presented in the following topics: advanced packaging by neo-wafers, chip to wafers integration, hetero-structures integration and wafer to wafer concept (front and back-end application). The examples of neo-wafer rebuilding for advanced packaging, the hetero- structure achieved by chip-to-wafer or wafer-to-wafer bonding and front-end and back-end architecture are discussed regarding the 3-D integration challenging requirements. The challenging cases of wafer-level integrated demonstrators for high density 3D inter-chips connections and wireless interconnections are presented. For some examples we give also the first electrical performances achieved with representative demonstrators.

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References
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[15]Charlet Barbara, Cioccio Léa. di, Dechamp Jérôme et al., Chip-to-chip interconnections based on the wireless capacitive coupling for 3D integration - Microelectronic Engineering 83(2006) p.21952199
[16]Fazzi A., Mangani L., Mirandola M., Charlet B., Jung E., Canegallo R. and Guerrieri R., 3D Capacitive Interconnections for Wafer-Level and Die-level assembly - submitted to IEEE Journal of Solid-State Circuits – to be published.
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