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Flat-band Voltage Study Of Atomic-layer-Deposited Aluminum-oxide Subjected To Spike Thermal Annealing

Published online by Cambridge University Press:  01 February 2011

V. R. Mehta
Affiliation:
Department of Physics, New Jersey Institute of Technology, Newark, New Jersey
A. T. Fiory
Affiliation:
Department of Physics, New Jersey Institute of Technology, Newark, New Jersey
N. M. Ravindra
Affiliation:
Department of Physics, New Jersey Institute of Technology, Newark, New Jersey
M. Y. Ho
Affiliation:
Chartered Semiconductor Manufacturing, Singapore
G. D. Wilk
Affiliation:
ASM International, Phoenix, Arizona
T. W. Sorsch
Affiliation:
Bell Laboratories, Lucent Technologies, Murray Hill, New Jersey
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Abstract

High-κ dielectrics based the oxide of Al were prepared by atomic layer deposition (ALD) on 200-mm p-type Si wafers. Films were deposited directly on clean Si or on 0.5-nm underlayers of rapid thermal oxide or oxynitrides grown in O2 and/or NO ambients. The purpose of the underlayer films is to provide a barrier for atomic diffusion from the crystal Si to the high-κ dielectric film. Deposited Al-oxide films varied in thickness from 2 to 6 nm. Post deposition anneals were used to stabilize the ALD oxides. Equivalent SiO2-oxide thickness varied from 1.0 to 3.5 nm. In situ P-doped amorphous-Si 160 nm films were deposited over the oxides to prepare heavily doped n-type gate electrodes in MOS structures. Samples were rapid thermal annealed in N2 ambient at 800°C for 30 s, or spike annealed at 950, 1000, and 1050°C (nominally zero time at peak temperature). Flat band voltages, VFB were determined from C-V measurements on dot patterns. The 800°C anneals were used as a baseline, at which the poly-Si electrodes are crystallized and acquire electrical activation while subjecting the high-κ dielectrics to a low thermal budget. Positive shifts in VFB were observed, relative to a pure SiO2 control, ranging from 0.2 to 0.8 V. Spike annealing reduces the VFB shift for ALD films deposited over underlayer films. The VFB shift and the changes with annealing temperature show systematic dependence on the nitridation of the underlayer.

Type
Research Article
Copyright
Copyright © Materials Research Society 2003

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References

1. Clemens, J. T. et al, “Aluminum oxide/silicon dioxide, double insulator MOS structure,” Bell System Technical Journal, pp. 687, 1975.Google Scholar
2. Wilk, G. D., Wallace, R. M. and Anthony, J. M., “High-κ gate dielectrics: Current status and materials properties considerations,” J. Appl. Phys. vol. 89, pp. 52435275, 2001.Google Scholar
3. Gusev, E. P., Cartier, E., Buchanan, D. A, Gribelyuk, M., Copel, M., Okorn-Schmidt, H. and D'Emic, C., “Ultrathin high-κ metal oxides on silicon: processing characterization and integration issues,” Elsevier Science, Microelectronic Engineering, pp. 341349, 59, 2001.Google Scholar
4. Torii, K., Shimamoto, Y., Saito, S., Obata, K., Yamauchi, T., Hisamoto, D., Yokoyama, N., Hiratani, M. and Onai, T., “Fixed charge-induced mobility degradation and its recovery in MISFETs with Al2O3 gate dielectric,” IEEE, IEDM, IWGI, pp. 230232, Tokyo, 2001.Google Scholar
5.NCSU CVC Analysis, Version 5.0”, (North Carolina State University, 2000).Google Scholar