Hostname: page-component-848d4c4894-75dct Total loading time: 0 Render date: 2024-05-16T02:59:50.691Z Has data issue: false hasContentIssue false

A Self-Aligned Silicide Technology using Ion-Beam Mixing, Doped Silicide, and Rapid Thermal Processing

Published online by Cambridge University Press:  25 February 2011

Y. H. Ku
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
S. K. Lee
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
D. L. Kwong
Affiliation:
Microelectronics Research Center, Department of Electrical and Computer Engineering, The University of Texas at Austin, Austin, TX 78712
P. Chu
Affiliation:
Charles Evans & Associates, Redwood City, CA 94063
Get access

Abstract

A SALICIDE process is described in this paper, in which ion-beam mixing is used for silicide formation, and doped silicide in conjunction with RTA drive-in are used for shallow silicided junction formation. Fundamental issues related to this process have been investigated, including (i) effects of ion-beam mixing and RTA on the properties of Ti SALICIDE and the interaction between Ti and SiO2; (ii) the self-aligned TiNxOy TiSi2 contact barrier formation and phase transformation; (iii) the mechanism of impurity rediWstrbution and segregation, and junction formation during RTA drive-in; and (iv) the performances and reliability of fabricated SALICIDE devices. Results show that this process may have a great impact on future VLSI technology.

Type
Research Article
Copyright
Copyright © Materials Research Society 1989

Access options

Get access to the full version of this content by using one of the access options below. (Log in options will check for institutional or personal access. Content may require purchase if you do not have access.)

References

REFERENCES

1. Ting, C. Y., IEDM Tech. Dig., 110 (1984).Google Scholar
2. Lau, C. K., See, Y. C., Scott, D. B., Bridges, J. M., and Davies, D. B., IEDM Tech. Dig., 714 (1982).Google Scholar
3. Alperin, M. E., Holloway, T. C., Haken, R. A., Gosmeyer, C. D., Karnaugh, R. V., and Parmantie, W. D., IEEE J. Solid State Circuits, SC–20, 61 1985.CrossRefGoogle Scholar
4. Park, H. A., Sachitano, J., McPherson, M., Yamaguchi, T., and Lehman, G., J. Vac. Sci. Technol., A2, 264 1984.Google Scholar
5. Chen, D. C., Cass, T. R., Turner, J. E., Merchant, P. P., and Chiu, K. Y., IEEE Trans. Electron Devices, vol. ED–33, 1463 1986.Google Scholar
6. Ku, Y. H., Louis, E., Shih, D. K., Lee, S. K., Kwong, D. L., and Alvi, N. S., Appl. Phys. Lett., 50, 1598 1987.Google Scholar
7. Delfino, M., Broadbent, E. K., Morgan, A. E., Burrow, B. J., and Norcott, M. H., IEEE Electron Device Letters, vol. 8. Ting, C. Y. and Wittmer, M., J. Appl. Phys. vol. 54, pp. 937943, Feb. 1983.Google Scholar
9. Shone, F. C., Saraswat, K. C., and Plummer, J. D., IEDM Tech. Dig., Washington, DC, pp.407410, Dec.l-4, 1985.Google Scholar