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3 - Higher Level Amplifier Stages

Published online by Cambridge University Press:  08 August 2019

Mikael Sahrling
Affiliation:
Tektronix Inc., Oregon
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Summary

The estimation analysis method is described in the context of sophisticated amplifiers. The purpose is to convince the reader of the usefulness of the technique by whetting their appetite with more complex systems. We start with a simple five transistor circuit and move on to comparators and cascaded amplifiers. All these are studied by applying simplifying assumptions followed by analytical solutions. Noise analysis and appropriate scaling techniques are also described in detail. The chapter further contains design examples and exercises to familiarize the reader more deeply with the methodology.

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Chapter
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Publisher: Cambridge University Press
Print publication year: 2019

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References

3.8 References

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Vinoth, R. and Ramasamy, S., “Design and Implementation of High Speed Latched Comparator Using gm/Id Sizing Method,” ICTACT Journal on Microelectronics, Vol. 2, No. 04, pp. 300304, 2017.Google Scholar
Razavi, B., “The StrongARM Latch,” IEEE Solid-State Circuits Magazine, Spring 2015.Google Scholar
Maloberti, F., Data Converters, Dordrecht: Springer, 2008.Google Scholar
van de Plassche, R., CMOS Integrated Analog-to-Digital and Digital-to-Analog Converters, 2nd edn., Dordrecht: Kluwer Academic, 2003.CrossRefGoogle Scholar
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