We have used high resolution transmission electron microscopy to study the formation of end- of- range defects after pre- amorphization due to Ge+ - implantation and subsequent furnace annealing at temperatures below 550 C. It is shown that depending on the annealing conditions two types of extrinsic stacking faults (SFs) are formed, i.e. {113}- defects or Frank- type {111} SFs. We present a scheme allowing the controlled deposition of Si self- interstitials into {113}- defects, which can be removed more easily than Frank type SFs during subsequent RTA under constraints of low thermal budget.