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Contributors
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- By Pierre Amarenco, Adrià Arboix, Marcel Arnold, Robert W. Baloh, John Bamford, Jason J. S. Barton, Claudio L. Bassetti, Christopher F. Bladin, Julien Bogousslavsky, Julian Bösel, Marie-Germaine Bousser, Thomas Brandt, John C. M. Brust, Erica C. S. Camargo, Louis R. Caplan, Emmanuel Carrera, Carlo W. Cereda, Seemant Chaturvedi, Claudia Chaves, Chin-Sang Chung, Isabelle Crassard, Hans Christoph Diener, Marianne Dieterich, Ralf Dittrich, Geoffrey A. Donnan, Paul Eslinger, Conrado J. Estol, Edward Feldmann, José M. Ferro, Joseph Ghika, Daniel Hanley, Ahamad Hassan, Cathy Helgason, Argye E. Hillis, Marc Hommel, Carlos S. Kase, Julia Kejda-Scharler, Jong S. Kim, Rainer Kollmar, Joshua Kornbluth, Sandeep Kumar, Emre Kumral, Hyung Lee, Didier Leys, Eric Logigian, Mauro Manconi, Elisabeth B. Marsh, Randolph S. Marshall, Isabel P. Martins, Josep Lluís Martí-Vilalta, Heinrich P. Mattle, Jérome Mawet, Mikael Mazighi, Patrik Michel, Jay Preston Mohr, Thierry Moulin, Sandra Narayanan, Kwang-Yeol Park, Florence Pasquier, Charles Pierrot-Deseilligny, Nils Petersen, Raymond Reichwein, E. Bernd Ringelstein, Gabriel J. E. Rinkel, Elliott D. Ross, Arnaud Saj, Martin A. Samuels, Jeremy D. Schmahmann, Stefan Schwab, Florian Stögbauer, Mathias Sturzenegger, Laurent Tatu, Pariwat Thaisetthawatkul, Dagmar Timmann, Jan van Gijn, Ana Verdelho, Francois Vingerhoets, Patrik Vuilleumier, Fabrice Vuillier, Eelco F. M. Wijdicks, Shirley H. Wray, Wendy C. Ziai
- Edited by Louis R. Caplan, Jan van Gijn
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- Book:
- Stroke Syndromes, 3ed
- Published online:
- 05 August 2012
- Print publication:
- 12 July 2012, pp vii-x
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Reliable, Fast and Long Retention Si Nanocrystal Non-Volatile Memories
- Josep Carreras, B. Garrido, J. Arbiol, J. R. Morante
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- Journal:
- MRS Online Proceedings Library Archive / Volume 830 / 2004
- Published online by Cambridge University Press:
- 01 February 2011, D5.5
- Print publication:
- 2004
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We report in this work a Si-nanocrystal (Si-nc) MOS basic cell which shows, at the same time, fast writing times and long charge retention. This has been achieved by optimizing a structure reported previously that exhibited excellent retention characteristics. For the new structure, 15 keV Si ions have been implanted in a 40 nm thick oxide at high doses in order to obtain Si excess ranging from 10 to 20 atomic % at projected range (25nm). An annealing step at 1100 °C has been performed to precipitate the nanocrystals. We show that there is a Si excess compromise (density depth profile of Si-nc) in which write times are improved by at least 3 orders of magnitude (to the submillisecond range) while still maintaining a virtually infinite retention time. Such behavior has been correlated with structural characterization by EFTEM, which reveals a control oxide completely free of Si clusters and thick enough (11 nm) to prevent tunnelling from/to the gate electrode. The Si-ncs are located around the projected range and show a mean size of 2.7 ± 0.2 nm. The tunnel oxide is not completely free of Si-nc or clusters, as observed by EFTEM, but there is a significant reduction in mean size and density when approaching to the p-type substrate. We believe that these small Si-nc or clusters in the tunnel oxide play an important role in improving the performance of the devices. For charging (writing), when a gate bias is applied to the structure, these clusters assist like traps when tunneling to the central region. However, when the Si-nc are already charged, these nanoclusters do not similarly enhance the discharge process because they have larger band-gaps (due to quantum confinement) than the bigger Si-nc in the center of the layer, and therefore act as an insulating material. This simple model, based on the correlation of the most important electrical memory parameters and the structural information, has allowed us to engineer the implantation dose as a technological parameter when a trade-off between write and retention times is required. For our samples, this dose is about of 15% Si excess. Finally, endurance tests have been performed, showing a completely flat and stable programming window after 106 Write/Erase programming pulses.
Low Voltage and High Speed Silicon Nanocrystal Memories
- Josep Carreras, B. Garrido, J. Arbiol, J. R. Morante
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- Journal:
- MRS Online Proceedings Library Archive / Volume 830 / 2004
- Published online by Cambridge University Press:
- 01 February 2011, D1.9
- Print publication:
- 2004
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We have studied a set of MOS cell structures with 30 nm thick thermal oxide implanted with Si at high doses (10, 15 and 20 atomic % at projected range) in which Si nanocrystals (Si-nc) have been precipitated by annealing at 1100 °C. Energy filtered transmission electron microscopy reveals: i) a central layer of Si-nc with a mean size of 2.8 nm; ii) a control oxide of 12.5 nm completely free of Si-nc and iii) a tunnel oxide of about 2.5 nm. This narrow tunnel oxide enables the direct tunnel for charging and discharging which is a must for high speed and good reliability. However, this results in typical retention times ranging from only few hours to several months, depending on the concentration of Si-nc. For developing low voltage memories we have focused on the highest Si excess sample, which shows fast write times (tens of μs) at very low gate fields (±2 MV/cm or ±6V). The onset of Fowler-Nordheim conduction is of about ±6 MV/cm by J-V measurements (±18V), which means that the structure works in a direct tunnel regime. To increase the retention time we have performed an additional annealing step in diluted O2 for 16 and 32 minutes, resulting in a dramatic increase in the retention times, which is attributed to the re-growth of an additional tunnel oxide which eliminates surface roughness, remaining Si excess and defects at the Si-SiO2 interface. This additional oxidation step produces also a decrease in the mean size of the Si-nc distribution. Thus, we increase the retention time beyond the 10 years standard limit. Finally, the writing times can be traded-off by increasing slightly the program voltage up to ±2.7 MV/cm or ±8V.
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