A self-aligned polycide gate interconnect process has been developed at STL
in order to reduce the RC delays in existing and planned MOS circuits. This
process has been chosen due to its ease of implementation into an existing
process line. Incoherent lamp annealing is used to form the silicide after
the deposition of titanium over patterned polysilicon.
This paper will discuss the various materials and processes considered,
outlining the significant attributes of each. The factors which must be
controlled to achieve a practical process are discussed, together with the
degree of redistribution of dopants and the role of other impurities.