Development of a complementary heterostructure field effect transistor (CHFET) technology for low-power, mixed-mode digital-microwave applications is presented. An earlier digital CHFET technology with independently optimizable transistors which operated with 319 ps loaded gate delays at 8.9 fJ is reviewed. Then work demonstrating the applicability of the digital nJFET device as a low-power microwave transistor in a hybrid microwave amplifier without any modification to the digital process is presented. A narrow band amplifier with a 0.7 × 100 μm nJFET as the active element was designed, constructed, and tested. At 1 mW operating power, the amplifier showed 9.7 dB of gain at 2.15 GHz and a minimum noise figure of 2.5 dB. In addition, next generation CHFET transistors with sub 0.5 μm gate lengths were developed. Cutoff frequencies, ft of 49 GHz and 11.5 GHz were achieved for n- and p-channel FETs with 0.3 and 0.4 μm gates, respectively. These FETs will enable both digital and microwave circuits with enhanced performance.

Semiconductor superlattices have been studied by grazing incidence x-ray scattering and x-ray diffraction. For superlattices of 100-period InGaAs/GaAs, lateral structural ordering has been found to occur in the material. For one particular sample (M1400), periodic thickness modulations have been observed in the InGaAs layers. X-ray results also provide evidence for an improvement of interface quality by using interrupt-growth method for 55-period AlAs/GaAs superlattices grown by MBE.

The influence of growth interruption during the MBE growth of (100) In0.5Ga0.5P/GaAs superlattices is investigated by cross-sectional TEM. It is observed that for certain combinations of interruption lengths and group V fluxes, the growth orientation of the superlattice changes spontaneously from [100] to <311> direction. V-shaped grooves with {311} facets form initially in the growth plane and eventually lead to the formation of regions of {311} superlattice structures. The direction of V-shaped grooves is along the [011[ axis, which is parallel to the surface dangling bonds of the group V atoms in the unreconstructed (100) plane. The most critical stage for the spontaneous change of the growth orientation is the interruption after the growth of a GaAs layer with the P2 flux. Our observations suggest that small but stable {311} facets form at this stage and develop into well-defined {311} growth planes during the growth of the GaAs layer.

Ohmic contacts to n-type Si have been formed using a thin n layer of Ge grown by selective-area molecular beam epitaxy. The n+Ge is used to lower the metal-semiconductor barrier energy and thus reduce the contact resistivity of the thin film structure. Al/n+Ge/n+Si test devices were fabricated in a manner compatible with conventional VLSI processing and consisted of a 3500 A thick layer of arsenic-doped Ge grown at 250°C on a selectively diffused, phosphorus-doped Si substrate. Using both four terminal Kelvin and transmission line devices, unsintered Al/Ge/Si structures exhibited contact resistivities a factor of five lower than Al/Si control devices, in agreement with theoretical calculations based on a simple tunneling model for the metal/Ge/Si heterojunction ohmic contact.