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  3. Designing Digital Computer Systems with Verilog
  • Cited by 5
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    • Publisher:
      Cambridge University Press
      Publication date:
      October 2009
      December 2004
      ISBN:
      9780511607059
      9780521828666
      9780521045728
      DOI:
      https://doi.org/10.1017/CBO9780511607059
      Dimensions:
      (247 x 174 mm)
      Weight & Pages:
      0.53kg, 176 Pages
      Dimensions:
      (247 x 174 mm)
      Weight & Pages:
      0.297kg, 176 Pages
      • Subjects:
      Engineering, Computer Hardware, Architecture and Distributed Computing, Computer Science, Computer Engineering
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    • Selected: Digital
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    Subjects:
    Engineering, Computer Hardware, Architecture and Distributed Computing, Computer Science, Computer Engineering
    Information

    Book description

    This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.

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