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M. Karnaugh. The map method for synthesis of combinational logic circuits. Transactions of the American Institute of Electrical Engineers, vol. 72 part I (1953), pp. 593–598.

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M. Karnaugh. The map method for synthesis of combinational logic circuits. Transactions of the American Institute of Electrical Engineers, vol. 72 part I (1953), pp. 593–598.

Published online by Cambridge University Press:  12 March 2014

Raymond J. Nelson
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Reviews
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The Journal of Symbolic Logic , Volume 20 , Issue 2 , June 1955 , pp. 197
Copyright
Copyright © Association for Symbolic Logic 1955

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