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Floating-Gate a-Si:H TFT Nonvolatile Memories

Published online by Cambridge University Press:  01 February 2011

Yue Kuo  and
Helinda Nominanda
Yue Kuo
Affiliation:
yuekuo@tamu.edu, Texas A&M University, Thin Film Nano & Microelectronics Research Laboratory, 235 J. E. Brown Eng. Bldg., MS 3122, TAMU, College Station, TX, 77843-3122, United States, 979-845-9807, 979-458-8836
Helinda Nominanda
Affiliation:
helinda@tamu.edu, Texas A&M University, Thin Film Nano & Microelectronics Research Laboratory, College Station, TX, 77843-3122, United States
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Abstract

Charge and discharge phenomena of the floating-gate amorphous silicon thin film transistor have been studied under dynamic operation conditions. The charge storage capacity decreases with the increase of the drain voltage because it is easier for electrons to be transported to the drain electrode than to be injected into the gate dielectric layer. The discharge efficiency with respect to the drain voltage has been investigated using three different discharge methods: negative gate bias voltage, light exposure, and thermal annealing, separately. The channel length affected both the charge capacity and the discharge efficiency due to the charge storage mechanism and the channel resistance. Majority of the stored charges were removed with the above method through various mechanisms. The low temperature favors the charge storage but the high temperature favors the discharge. This study revealed key parameters for the optimum operation of the low temperature fabricated nonvolatile memory device.

Keywords

Sithin filmmemory
Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 1066: Symposium A – Amorphous and Polycrystalline Thin-Film Silicon Science and Technology—2008 , 2008 , 1066-A08-02
Copyright
Copyright © Materials Research Society 2008

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References

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