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Thin Film Stresses in TiW/AlCuSi/TiW Sandwich Structures

Published online by Cambridge University Press:  22 February 2011

Iton Wang*
Affiliation:
Circuit Technology Group, Hewlett Packard Company, 5301 Stevens Creek Blvd., Santa Clara, CA 95051
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Abstract

A highly reliable metallization for high current bipolar integrated circuits was developed with the aid of thin film stress analysis to optimize the process. The final structure was a sandwich layer of TiW and AlCuSi alloy. Film stresses were measured for individual TiW layers as well as for the sandwich layers of TiW/AlCuSi/TiW. In this paper, it will be shown how sputter deposition pressure can drastically affect film stress. For individual TiW layers, the film stress can be varied between compressive and highly tensile by adjusting the Argon pressure. Meanwhile, the AlCuSi layers were always tensile under the normal range of sputtering pressures. By controlling the individual film stresses, a sandwich layer can be designed so that the overall structure has a very low average stress. This work will also show how a TiW capping layer has a major effect on the final average stress of the sandwich structure.

Type
Research Article
Copyright
Copyright © Materials Research Society 1989

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References

[1] Thomas, M.E., Hartnett, M.P., McKay, J.E., Kapoor, A.K. and Chinn, J.D., IEEE Proc. VLSI Multilevel Interconnection Conference, Santa Clara, CA, 1988, pp. 183190.Google Scholar
[2] Nowicki, R.S., Harris, J.M., Nicolet, M.A. and Mitchell, I.V., Thin Solid Films, 53, 195 (1978).CrossRefGoogle Scholar
[3] Ting, C.H. and Lin, H.Y., IEEE Proc. VLSI Multilevel Interconnection Conference, Santa Clara, CA, 1987; pp. 6177; B. Lee and E.C. Douglas, IEEE Proc. VLSI Multilevel Interconnection Conference, Santa Clara, CA, 1987; pp. 85–92; P. Pai, W.G. Oldham and C.H. Ting, IEEE Proc. VLSI Multilevel Interconnection Conference, Santa Clara, CA, 1987, pp. 364–370.Google Scholar
[4] Broadbent, E.K., J. Vac. Sci. Technol. B 5 (6), 1661 (1987).CrossRefGoogle Scholar
[5] Oakley, R.E., Rhodes, S.J., Armstrong, E. and Marsh, A., IEEE Proc. VLSI Multilevel Interconnection Conference, New Orleans, LA, 1984, pp. 23–29.Google Scholar
[6] Ionic Systems Note, “Substrate Impact on Stress Measurement”, June 10, 1988.Google Scholar
[7] Ionic Systems Note, ” Tech Topic on Film Stress”, June 10, 1988.Google Scholar
[8] Glang, R., Holmwood, R.A., and Rosenfeld, R.L., The Review of Scientific Instruments, 36 (1), Jan. 1965.CrossRefGoogle Scholar
[9] Koyama, H., Mashiko, Y., Nishioka, T., “Suppression of Stress Induced Aluminum Void Formation”, 24th Annual Proc. in IEEE Int. Reliability Phys. Symp., 24 (1986).10.1109/IRPS.1986.362107Google Scholar
[10] Yue, J., Funsten, W., Taylor, R., “Stress Induced Voids in Aluminum Interconnects During IC Processing”, 23rd Annual Proc. in IEEE Int. Reliability Phys. Symp., 126 (1985)10.1109/IRPS.1985.362087Google Scholar