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Backside Analysis of Ultra-Thin Film Stacks in Microelectronics Technology Using X-ray Photoelectron Spectroscopy

Published online by Cambridge University Press:  31 January 2011

Thomas Hantschel
Affiliation:
thomas.hantschel@imec.be, IMEC, Kapeldreef 75, Leuven, B-3001, Belgium
Cindy Demeulemeester
Affiliation:
cindy.demeulemeester@imec.be, IMEC, Leuven, Belgium
Arnaud Suderie
Affiliation:
suderie@hotmail.com, IMEC, Leuven, Belgium
Thomas Lacave
Affiliation:
thomaslacave@hotmail.com, IMEC, Leuven, Belgium
Thierry Conard
Affiliation:
Thierry.Conard@imec.be, IMEC, Leuven, Belgium
Wilfried Vandervorst
Affiliation:
vdvorst@imec.be, IMEC, Leuven, Belgium
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Abstract

X-ray photoelectron spectroscopy (XPS) has become increasingly important over the past few years for supporting the development of ultra-thin layers for high-k metal gates. As the analysis depth of XPS is however limited to about 5-7 nm, it would be extremely useful if the analysis could be carried out from the backside using standard silicon wafers. This approach puts extreme requirements on the sample preparation as hundreds of micrometers of bulk silicon have to be removed and one has to stop with nanometer precision when reaching the interface to the ultra-thin layer stack. Therefore, we have developed dedicated procedures for preparing and analyzing samples for backside XPS analysis. This paper presents the developed approach with a focus on sample preparation using plan-parallel polishing, endpoint detection by interference fringes, and selective wet etching. First angle-resolved XPS (ARXPS) analysis results of metal gate stacks demonstrate the power of such backside analysis.

Type
Research Article
Copyright
Copyright © Materials Research Society 2009

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