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Carrier Transport in One-dimensional Ge Nanowires/Si Substrate Heterojunctions

Published online by Cambridge University Press:  01 February 2011

Eun-Kyu Lee
Affiliation:
Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, New Jersey
Boris V. Kamenev
Affiliation:
Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, New Jersey
Pavel A. Forsh
Affiliation:
Physics Department, Moscow State University, Moscow, Russian Federation
Ted I. Kamins
Affiliation:
Quantum Science Research, Hewlett-Packard Laboratories, Palo Alto, California
Leonid Tsybeskov
Affiliation:
Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, New Jersey
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Abstract

Samples of Ge Nanowires (Ge NWs) grown by chemical vapor deposition (CVD) on single crystal, (100) and (111) oriented Si substrates were studied with respect to their electrical properties. Using different contact geometries, direct current (DC) and alternating current (AC) electrical and photoelectrical measurements were carried out at room temperature. A rectifying junction behavior was observed indicating a low defect density at NWs/substrate heterointerface. AC conductance exhibits significant frequency dependence with a power law behavior, suggesting that carrier transport in Ge NW volume is associated with hopping processes.

Type
Research Article
Copyright
Copyright © Materials Research Society 2005

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References

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