In this work, non-volatile memory based on silicon nano trap was implemented by implanting silicon into oxide-nitride-oxide layers(ONO) on silicon. The charge storage effects in these memory structures were measured using capacitance-voltage techniques in polysilicon-ONO- silicon structures in terms of silicon implantation dose. Without silicon implantation, the devices did not the threshold shift (memory window). The memory window was found to be dependent on silicon implantation dose and DC bias (programming) voltage. The memory window did show any degradation by annealing in nitrogen or forming gas environment at 450 °C for 30 minutes. Nano trap memory elements were fabricated with 0.35 micron technology showed encouraging results up to 1e5 program/erase cylces.
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