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A Compact Single-Walled Carbon Nanotube Transistor Integrated with a Silicon MOSFET Using a Single Common Gate

Published online by Cambridge University Press:  01 February 2011

Hao Lin ,
Yong Wook Park  and
Sandip Tiwari
Hao Lin
Affiliation:
lh77@cornell.edu, Cornell University, Applied & Engineering Physics, 3D Vista Lane, Ithaca, NY, 14850, United States, 607-273-5430
Yong Wook Park
Affiliation:
pyw@nsu.ac.kr, Namseoul University, Chonan-si, N/A, Korea, Republic of
Sandip Tiwari
Affiliation:
st222@cornell.edu, Cornell University, Department of Electrical and Computer Engineering, Ithaca, NY, 14850, United States
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Abstract

Single-walled carbon nanotubes have been integrated on top of an individual CMOS device using lithography, chemical vapor deposition and chemical mechanical planarization. Hybrid integration of silicon and nanotube transistors is demonstrated for the first time by making an inverter with a p-type CNTFET placed on top of an n-type MOSFET. A polysilicon gate is positioned between the silicon device channel and carbon nanotube for dense integration of opposite-polarity devices. Such a configuration offers many advantages for high-density electronics and ultra-sensitive detection.

Keywords

nanostructureCMPlithography (deposition)

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 963: Symposium Q – Nanowires and Carbon Nanotubes – Science and Applications , 2006 , 0963-Q14-04
Copyright
Copyright © Materials Research Society 2007

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References

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