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Effect of Spacer Scaling on PMOS Transistors

Published online by Cambridge University Press:  01 February 2011

Wai Shing Lau ,
Chee Wee Eng ,
David Vigar ,
Lap Chan  and
Soh Yun Siah
Wai Shing Lau
Affiliation:
ewslau@ntu.edu.sg, Nanyang Technological University, School of EEE, NTU, School of EEE, Block S2.1, Nanyang Avenue, Singapore, Singapore, 639798, Singapore, (65) 97425167, (65) 6733318
Chee Wee Eng
Affiliation:
engcw@charteredsemi.com, Chartered Semiconductor Manufacturing Ltd, Woodlands Industrial Park D St. 2, Singapore, Singapore, 738406, Singapore
David Vigar
Affiliation:
vigardavid@charteredsemi.com, Chartered Semiconductor Manufacturing Ltd, Woodlands Industrial Park D St. 2, Singapore, Singapore, 738406, Singapore
Lap Chan
Affiliation:
chanlap@charteredsemi.com, Chartered Semiconductor Manufacturing Ltd, Woodlands Industrial Park D St. 2, Singapore, Singapore, 738406, Singapore
Soh Yun Siah
Affiliation:
siahsy@charteredsemi.com, Chartered Semiconductor Manufacturing Ltd, Woodlands Industrial Park D St. 2, Singapore, Singapore, 738406, Singapore
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Abstract

Our observation is that both the on-current and off-current of state-of-the-art p-channel MOS transistors tend to become larger when the L-shaped spacer becomes smaller due to two different mechanisms: a decrease in the effective channel length Leff (Mechanism A) and a decrease in the series resistance (Mechanism B). In our analysis, we use drain induced barrier lowering (DIBL) as a measure of Leff and we assume that there is a linear relationship between the on-current, the logarithm of the off current and DIBL. Our assumption is supported by our theoretical derivations.

Keywords

electrical propertiesdevicesSi

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 913: Symposium D – Transistor Scaling – Methods, Materials and Modeling , 2006 , 0913-D03-04
Copyright
Copyright © Materials Research Society 2006

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References

1 Shishiguchi, S., Mineji, A. and Matsuda, T., Jpn. J. Appl. Phys., vol. 42, pp. 7265–7271 (2003).Google Scholar
2 Ye, Q. and Biesmans, S., Solid-State Electron., vol. 48, pp. 163–166 (2004).Google Scholar
3 Eyben, P., Duhayon, N., Stuer, C., Wolf, I. De, Rooyackers, R., Clarysse, T., Vandervorst, W. and Badenes, G., MRS Symp. Proc, vol. 669, pp. J2.2.1–J2.2.6 (2001).Google Scholar
4 Lundstrom, M. S., IEEE Electron Dev. Lett., vol. 18, pp. 361–363 (1997).Google Scholar
5 Lundstrom, M. S., IEEE Electron Dev. Lett., vol. 22, pp. 293–295 (2001).Google Scholar
6 Liao, H., Lee, P.S., Goh, L.N.L., Liu, H., Sudijono, J.L., Elgin, W. and Sanford, C., Thin Solid Films, vol. 462–463, pp. 29–33 (2004).Google Scholar