Under a joint development contract with Applied Materials (AMAT) and Texas Instruments (TI), SEMATECH undertook a project (Joint Development Project J100) with a goal of delivering a cost effective, technically advanced Rapid Thermal Processor (RTP). The RTP tool was specified to meet the present and future manufacturing needs of SEMATECH's member companies. The J100 results contained here will focus on the temperature and control performance of the AMAT RTP tool. The J100 results on the temperature measurement and control performance of AMAT's RTP tool using bare backside monitor wafers were presented in part I. In actual manufacturing environments the backside conditions of wafers are not consistent which causes temperature variations during rapid thermal processing. In this experiment, boron monitor wafers with varying backside conditions were used to test the uniformity, repeatability, and stability of the tool. The wafer backside films were fabricated using predictions from emissivity models and were subsequently verified by experimental techniques. In addition, perturbation experiments utilizing boron and arsenic implanted wafers demonstrated a high degree of localized temperature control across the wafers. A 3-sigma temperature variation ranging from 3.0 °C (for wafers with similar backside films) to 6.0 °C (for wafers with varying backside films) was found for all wafers processed during this evaluation. The perturbation experiments, which included a forced temperature offset of two degrees at one of the wafer temperature sensors, resulted in a noticeable change in sheet resistance across the wafer.