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Fast Simulation Tool For MOS/SOI Process Optimization

Published online by Cambridge University Press:  28 February 2011

P. Paelinck ,
O. Vancauwenberghe  and
F. Van de Wiele
P. Paelinck
Affiliation:
Laboratoire de Microelectronique, Université Catholique de Louvain, Place du Levant 3, 1348 Louvain-la-Neuve, Belgium
O. Vancauwenberghe
Affiliation:
Laboratoire de Microelectronique, Université Catholique de Louvain, Place du Levant 3, 1348 Louvain-la-Neuve, Belgium
F. Van de Wiele
Affiliation:
Laboratoire de Microelectronique, Université Catholique de Louvain, Place du Levant 3, 1348 Louvain-la-Neuve, Belgium
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Abstract

A fast simulation tool for MOS/SOI process optimization has been developed.lt solves Poisson's and one carrier current density equations in the one-dimensional case. NMOS and PMOS transistors characteristics in the linear region are reliably computed over a wide range of voltages. Moreover, special attention has been paid for threshold voltage (calculated by extrapolating the inversion charge as a function of front gate voltage ) and subthreshold current calculation. Therefore, process parameters can be easily selected in order to get enhanced device capabilities.

Information

Type
Research Article
Information
MRS Online Proceedings Library (OPL) , Volume 107: Symposium H – Silicon-on-Insulator and Buried Metals in Semiconductors , 1987 , 359
Copyright
Copyright © Materials Research Society 1988

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References

1 Van de Wiele, F., Solid-state Electronics 22 (8-9), 824–826 (1984)Google Scholar