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From SOI 1T-DRAMs to Unified Memory Concepts

Published online by Cambridge University Press:  07 June 2012

Sorin Cristoloveanu
Affiliation:
IMEP-LAHC (UMR 5130), Grenoble INP Minatec, 38016 Grenoble Cedex 1, France
Maryline Bawedin
Affiliation:
IES (UMR 5214), Université de Montpellier II, 34095 Montpellier, France
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Abstract

The typical architectures for single-transistor capacitorless dynamic random access memory (1T-DRAM) are reviewed. This memory takes advantage of floating-body effects in SOI-like devices. The principles of operation and the key mechanisms for memory programming and reading are described. Most of these devices can be enriched with non-volatile storage capability. Several possibilities for such ‘unified’ memory are explored.

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Articles
Copyright
Copyright © Materials Research Society 2012

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References

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