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Grain Boundary Confinement in Soi Films Using Patterned Ar Coatings and Seeded Oscillatory Growth

Published online by Cambridge University Press:  22 February 2011

C.I. Drowley
Affiliation:
Hewlett-Packard Laboratories, 3500 Deer Creek Road, Palo Alto, CA 94304
P. Zorabedian
Affiliation:
Hewlett-Packard Laboratories, 3500 Deer Creek Road, Palo Alto, CA 94304
T.I. Kamins
Affiliation:
Hewlett-Packard Laboratories, 3500 Deer Creek Road, Palo Alto, CA 94304
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Abstract

Regular arrays of grain-boundary-free silicon strips several hundred microns long have been produced in a silicon-on-insulator (SOI) structure by using a patterned anti-reflection (AR) coating in combination with seeded oscillatory growth techniques. The AR coating pattern consists of a series of parallel stripes (typically 10 μm wide, separated by 10 μm spaces) starting from a seeding window. A laser beam (typically a 50 μm × 250 μm elliptical beam) is scanned perpendicular to the stripes, with the long axis of the beam parallel to the scan direction. The beam is stepped 1–2 μm between successive scans to advance the single crystal along the direction of the AR stripes. Grain boundaries are confined to the region under the AR stripes. Stereographic analysis of KOH etch pits formed in the single crystal strips has shown that the orientation of the stripes gradually rotates from (001)[110] to (013)[331] as the crystal propagates away from the seed. MOS transistors formed in the single-crystal strips have mobilities comparable to devices formed in bulk films. These mobilities are approximately 20% higher than those found in devices formed in large-grain recrystallized polysilicon films.

Type
Research Article
Copyright
Copyright © Materials Research Society 1984

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References

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