Hydrogen out-diffusion from the n/i interface region plays a major role in controlling the fill factor (FF) and resultant efficiency of n-i-p a-Si:H devices, with the i-layer deposited at high substrate temperatures by the hot wire technique. Modeling calculations show that a thin, highly defective layer at this interface, perhaps caused by significant H out-diffusion and incomplete lattice reconstruction, results in sharply lower device FF's due to the large voltage dropped across this defective layer. One approach to this problem is to introduce trace dopant tailing to ‘compensate’ these defects, but the resultant cells exhibit a poor red response. A second approach involves the addition of buffer layers designed to retard this out-diffusion. We find that an increased H content, either in the n-layer or a thin intrinsic low temperature buffer layer, does not significantly retard this out-diffusion, as observed by secondary ion mass spectrometry (SIMS) H profiles on devices. All these devices have a defect-rich i-layer region near the n/i interface and a poor device efficiency. However, if this low temperature buffer layer is thick enough, the outdiffusion is minimized, yielding nearly flat H profiles and a much improved device performance. We discuss this behavior in the context of the H chemical potentials and H diffusion coefficients in the high temperature, buffer, n-, and stainless steel (SS) substrate layers. The chemical potential differences between the layers control the direction of the H flow and the respective diffusion coefficients, which depend upon many factors such as the local electronic Fermi energy and the extent of the H depletion, determine the rate. Finally, we report a 9.8% initial active area device, fabricated at 16Å/s, using the insights obtained in this study.